From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AC1BC433FE for ; Thu, 13 Oct 2022 00:46:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232284AbiJMAqO (ORCPT ); Wed, 12 Oct 2022 20:46:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232100AbiJMApd (ORCPT ); Wed, 12 Oct 2022 20:45:33 -0400 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 485D9F6C26 for ; Wed, 12 Oct 2022 17:37:55 -0700 (PDT) Received: by mail-pj1-f46.google.com with SMTP id x1-20020a17090ab00100b001fda21bbc90so3473332pjq.3 for ; Wed, 12 Oct 2022 17:37:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=sLhr5UEdODqNRx69fxh3jRb3tIUO59cTzeH/dk/N40Q=; b=lbMVFVWkt0+AkHPs/B78S0AxNXAwt0BHhEEleMCC13XefRbkjVr/zYJa9cIA4U+1Tn Kh5KCDMTEwuzJSOdivAYr3z7C3LqHtKfsLndTo1O/FVZClyqgq0ce2ewl/4DflH1y0Fj PGFrZ0rmvQwRyrTNjYRgQv+WvCDyHNrNnf+KVZBNclaBDoavl3ru6CnrLs0vyD5ikGhO X5MlfW4tzv7iriza1GkwYh3wgkJW+Q8Pd3pC1y0IfONIe/Tku4HNWhdmWu6yyER4e2Zh swD9TclYa0nG9MGMttykmy85WrLUn4q2z0w5xKDUcjN03H9MQ4u5xR1XVA4te818+LYR Gxmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=sLhr5UEdODqNRx69fxh3jRb3tIUO59cTzeH/dk/N40Q=; b=WQ929olHE8fT8fYA+uEBHswsG7Am5Wg7FHpfd9ckcqSM+1/zIl49+3VnbM6uXahh5s K9Vs7wwYFa7Bvts43Hw0f9IswnEYDOy44JAADOSUornbjjrXdPgIDm7EyVe4ijy0ZD3V VvAn/+yim3BnlHACS2MlT1qAmbzxKY7NvOUMtiKx0VSE8+f1SGpodSEMcVmBr8o7bLK0 kOGjfbi4cCLckctqJKTv0sK6lC9iuLN8pk9nOa9c36q6M+SdWz0KIjRbRqkN7ipys845 fbKM+zETOetfpyhYTyEKgkjH+pcvNDaKCkB7t4ao4BbbrszTk6RtGOiEFQjPk41+COqE PoeQ== X-Gm-Message-State: ACrzQf3fnhVFnedFQ2BAosBEabqzbRbosO6VBNtHV2HK0yS6B6PV8GoJ MZAwBWSm3URb4qKiJQbVNGS8Jm0fk4O3Hg== X-Google-Smtp-Source: AMsMyM4WKigvoVxiMMu10g2VZ2ng5TIMKMfZh/e73wzbvqLvNPoDk+tQGo8Z7ow8byi/dCkgCUpK5Q== X-Received: by 2002:a05:6a00:bc7:b0:562:d2e5:adfd with SMTP id x7-20020a056a000bc700b00562d2e5adfdmr30000973pfu.4.1665620733630; Wed, 12 Oct 2022 17:25:33 -0700 (PDT) Received: from google.com (7.104.168.34.bc.googleusercontent.com. [34.168.104.7]) by smtp.gmail.com with ESMTPSA id c1-20020a170902d48100b00182a9c27acfsm6287423plg.227.2022.10.12.17.25.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Oct 2022 17:25:33 -0700 (PDT) Date: Thu, 13 Oct 2022 00:25:29 +0000 From: Sean Christopherson To: isaku.yamahata@intel.com Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Paolo Bonzini , Thomas Gleixner , Marc Zyngier , Will Deacon , isaku.yamahata@gmail.com, Kai Huang , Chao Gao , Atish Patra , Shaokun Zhang , Daniel Lezcano , Huang Ying , Huacai Chen , Dave Hansen , Borislav Petkov Subject: Re: [PATCH v5 00/30] KVM: hardware enable/disable reorganize Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Sep 22, 2022, isaku.yamahata@intel.com wrote: > From: Isaku Yamahata > > This patch series is to implement the suggestion by Sean Christopherson [1] > to reorganize enable/disable cpu virtualization feature by replacing > the arch-generic current enable/disable logic with PM related hooks. And > convert kvm/x86 to use new hooks. Thanks for putting this together, actually seeing code is super helpful! Unfortunately, after seeing the code, I think my suggestion was a bad one. At the end of this series, there's a rather gross amount of duplicate code between x86 and common KVM, and no clear line of sight to improving things. Even if we move ARM, s390, and PPC away from the generic hooks, MIPS and RISC-V still need the generic implementation, i.e. we'll still have duplicate code. Rather than force arch code to implement most/all power management hooks, I think we can achieve a similar outcome (let ARM do its own thing, turn s390 and PPC into nops) by wrapping the hardware enable/disable (and thus PM code) in a Kconfig, e.g. KVM_GENERIC_HARDWARE_ENABLING. I'll throw together a rough prototype tomorrow (got partway through and then got distracted by other stuff) and hopefully post an RFC series. Thanks again!