From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Winkler, Tomas" <tomas.winkler@intel.com>
Cc: David Airlie <airlied@linux.ie>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Usyskin, Alexander" <alexander.usyskin@intel.com>,
Daniel Vetter <daniel@ffwll.ch>,
"Lubart, Vitaly" <vitaly.lubart@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
Date: Mon, 31 Oct 2022 06:15:29 -0400 [thread overview]
Message-ID: <Y1+gQbGwHhY1U5q+@intel.com> (raw)
In-Reply-To: <MN2PR11MB4093A0C8F12980AEFAAF02DEE5379@MN2PR11MB4093.namprd11.prod.outlook.com>
On Mon, Oct 31, 2022 at 05:48:07AM -0400, Winkler, Tomas wrote:
>
> >
> > On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote:
> > > From: José Roberto de Souza <jose.souza@intel.com>
> > >
> > > For multi-tile setups the GSC operational only on the tile 0.
> > > Skip GSC auxiliary device creation for all other tiles.
> > >
> > > Cc: Tomas Winkler <tomas.winkler@intel.com>
> > > Cc: Vitaly Lubart <vitaly.lubart@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
> > > 1 file changed, 6 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > index 2e796ffad911..92ad8cd45ddb 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > @@ -456,7 +456,10 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
> > >
> > > void intel_gt_driver_register(struct intel_gt *gt) {
> > > - intel_gsc_init(>->gsc, gt->i915);
> > > + if (gt->info.id == 0)
> > > + intel_gsc_init(>->gsc, gt->i915);
> > > + else
> > > + drm_dbg(>->i915->drm, "Not initializing gsc for remote
> > tiles\n");
> >
> > It looks to me that we need to move the gsc out of the intel_gt instead of
> > workaround the initialization.
>
> The interrupts are handled by gt, so where this should go ?
>
Ouch, I've seen it now. But still this patch brings me more doubts...
is gsc really a per-gt thing? if not why the gsc irq is in the gt domain?
if yes why the one in the second tile not operational?
if it is not a per-tile thing and only the irq is in a bad spot we could
still move it outside gt and make the irq to be redirected.
well, if it is really a per tile thing but it is fused of, do we have hw
ways to detect that?
if it is really a tile thing and we don't have better ways to identify
we might want to do with this patch, but add a bit more information on the
reasons and also double checking if by avoiding the initialization we are
sure that we are not going to reach any case of attempting to utilize the
un-initialized gsc.
next prev parent reply other threads:[~2022-10-31 10:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 5:51 [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0 Alexander Usyskin
2022-10-31 6:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2022-10-31 9:35 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2022-10-31 9:48 ` Winkler, Tomas
2022-10-31 10:15 ` Rodrigo Vivi [this message]
2022-11-09 14:56 ` Usyskin, Alexander
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