From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C1B9C4332F for ; Thu, 20 Oct 2022 13:53:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229661AbiJTNxV (ORCPT ); Thu, 20 Oct 2022 09:53:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229552AbiJTNxU (ORCPT ); Thu, 20 Oct 2022 09:53:20 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 465B51863FB; Thu, 20 Oct 2022 06:53:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1666273995; x=1697809995; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=CezaQ6FZiRtuuhnBRuO3KdKRT5p4X9KJSGf6RIFTEQg=; b=vfFvKcEiJYym5gPmcMm+09rFNr2S032hz49W6DOBrMFVjvWmCAqmeWth ZQaITGLmOA96uRw64Bz8TUpSLkNpTk0bKxJztlpcXcYh3uN9ufK1PLM0q 4OG+8pknKJN5j5LcoSCbRAKxn+kZzbwhPrE0257La0DCIaXDN+CG7D8p7 haWey7bB/t0ltBM0pfBoQOPLvmvkPZZEksQf6IEWiUFMD85x0wffvyWdp 96U9/FcEVRvj6cXbnSgHDqx52JMDyxbyN7StNHUT/EKWz2MrWQi0Ac0Ke yrudQbXIKMireez0RsHZWd8+KAUKYELv8+3fU1Nr+iMY3MFX8d5GxlypK Q==; X-IronPort-AV: E=Sophos;i="5.95,198,1661842800"; d="scan'208";a="183149311" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Oct 2022 06:53:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 20 Oct 2022 06:53:09 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Thu, 20 Oct 2022 06:53:04 -0700 Date: Thu, 20 Oct 2022 14:52:48 +0100 From: Conor Dooley To: Bjorn Helgaas CC: kernel test robot , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Heiko Stuebner , , Lorenzo Pieralisi , , Minghuan Lian , Thierry Reding , Thomas Petazzoni , Bharat Kumar Gogada , Toan Le , , "Kishon Vijay Abraham I" , Rob Herring , "Linus Walleij" , Joyce Ooi , "Jonathan Hunter" , , , Shawn Lin , Ray Jui , , , Mingkai Hu , Roy Zang , Michal Simek , , Scott Branden , Daire McNamara , , Tom Joseph , , Pali =?iso-8859-1?Q?Roh=E1r?= Subject: Re: [PATCH] PCI: Remove unnecessary of_irq.h includes Message-ID: References: <20221020134547.GA94120@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20221020134547.GA94120@bhelgaas> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote: > [+cc Pali, heads-up for trivial addition of to > pci-mvebu.c] > > On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote: > > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote: > > > Hi Bjorn, > > > > > > I love your patch! Yet something to improve: > > > > > > >> drivers/pci/controller/pcie-microchip-host.c:473:31: error: incomplete definition of type 'struct irq_domain' > > > struct mc_pcie *port = domain->host_data; > > > > That's what I get for only visually inspecting the patch before Acking > > it.. Un-ack I suppose. > > No problem! > > I think what happened is the pcie-microchip-host.c uses > irq_domain_add_linear() so it needs , but it > currently gets it via , which it doesn't otherwise > need. > > I added a preparatory patch to include explicitly, > but I haven't been able to cross-build either riscv or ia64 to verify > this fix. I'll wait a few days and post an updated series for the > 0-day bot to test. I saw you saying you couldn't find the config from LKP, FWIW a build using riscv defconfig w/ CONFIG_PCIE_MICROCHIP_HOST=y fails for me in the same way as lkp reports. Otherwise, dump the patch in response to this and I'll give it a shot later if you like? HTH, Conor. > > Same situation for pcie-altera-msi.c. > > pci-mvebu.c also relies on getting via > , but it actually depends on of_irq.h, so I'll just > add an irqdomain.h include there. > > Bjorn > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D6B7C4332F for ; Thu, 20 Oct 2022 14:18:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Etdk59GV8b0KtXpQSlmtikvcNxlRkPidxuB42YEyRYM=; b=D70qO3avJ0MmHn kHuYHygGB2d9CYd7jXM+Y8bn/W33Kx6pvmeEmL0D22QGvH2vw2EIWMNXyV4iCwfZHSED4HGlRMmPz fAdsF+1OCU/ViTpnXl+KYa8GKXwNDN2ZMfxirLlCBGib3kBu/5BFe8tEnLGkTEdelBUYq4YwioeGF eoOAoDxQyfSxzbTaNLYE+7SfdGiViwUu/H9m/QfR9Zablfy7Otfed5+OB6we6C7sXp0BRY32uhhPk dTV7cXGBp6sbSbfU3ycrIMkSL+k9whcnp22WPa/hTN86ap1rvZLM9SRnwld0G5xCIWV6xv0GAbWq/ 6NyVo7+DMK6EKvGc1bJg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1olWNI-00G0Nl-PS; Thu, 20 Oct 2022 14:18:20 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1olVz1-00FmLC-Ss; Thu, 20 Oct 2022 13:53:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1666273995; x=1697809995; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=CezaQ6FZiRtuuhnBRuO3KdKRT5p4X9KJSGf6RIFTEQg=; b=vfFvKcEiJYym5gPmcMm+09rFNr2S032hz49W6DOBrMFVjvWmCAqmeWth ZQaITGLmOA96uRw64Bz8TUpSLkNpTk0bKxJztlpcXcYh3uN9ufK1PLM0q 4OG+8pknKJN5j5LcoSCbRAKxn+kZzbwhPrE0257La0DCIaXDN+CG7D8p7 haWey7bB/t0ltBM0pfBoQOPLvmvkPZZEksQf6IEWiUFMD85x0wffvyWdp 96U9/FcEVRvj6cXbnSgHDqx52JMDyxbyN7StNHUT/EKWz2MrWQi0Ac0Ke yrudQbXIKMireez0RsHZWd8+KAUKYELv8+3fU1Nr+iMY3MFX8d5GxlypK Q==; X-IronPort-AV: E=Sophos;i="5.95,198,1661842800"; d="scan'208";a="183149311" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Oct 2022 06:53:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 20 Oct 2022 06:53:09 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Thu, 20 Oct 2022 06:53:04 -0700 Date: Thu, 20 Oct 2022 14:52:48 +0100 From: Conor Dooley To: Bjorn Helgaas CC: kernel test robot , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Heiko Stuebner , , Lorenzo Pieralisi , , Minghuan Lian , Thierry Reding , Thomas Petazzoni , Bharat Kumar Gogada , Toan Le , , "Kishon Vijay Abraham I" , Rob Herring , "Linus Walleij" , Joyce Ooi , "Jonathan Hunter" , , , Shawn Lin , Ray Jui , , , Mingkai Hu , Roy Zang , Michal Simek , , Scott Branden , Daire McNamara , , Tom Joseph , , Pali =?iso-8859-1?Q?Roh=E1r?= Subject: Re: [PATCH] PCI: Remove unnecessary of_irq.h includes Message-ID: References: <20221020134547.GA94120@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221020134547.GA94120@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221020_065316_053884_9A4FABA2 X-CRM114-Status: GOOD ( 19.73 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote: > [+cc Pali, heads-up for trivial addition of to > pci-mvebu.c] > > On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote: > > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote: > > > Hi Bjorn, > > > > > > I love your patch! Yet something to improve: > > > > > > >> drivers/pci/controller/pcie-microchip-host.c:473:31: error: incomplete definition of type 'struct irq_domain' > > > struct mc_pcie *port = domain->host_data; > > > > That's what I get for only visually inspecting the patch before Acking > > it.. Un-ack I suppose. > > No problem! > > I think what happened is the pcie-microchip-host.c uses > irq_domain_add_linear() so it needs , but it > currently gets it via , which it doesn't otherwise > need. > > I added a preparatory patch to include explicitly, > but I haven't been able to cross-build either riscv or ia64 to verify > this fix. I'll wait a few days and post an updated series for the > 0-day bot to test. I saw you saying you couldn't find the config from LKP, FWIW a build using riscv defconfig w/ CONFIG_PCIE_MICROCHIP_HOST=y fails for me in the same way as lkp reports. Otherwise, dump the patch in response to this and I'll give it a shot later if you like? HTH, Conor. > > Same situation for pcie-altera-msi.c. > > pci-mvebu.c also relies on getting via > , but it actually depends on of_irq.h, so I'll just > add an irqdomain.h include there. > > Bjorn > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 901F2C433FE for ; Thu, 20 Oct 2022 13:54:24 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4MtTbz0RgNz3ds5 for ; Fri, 21 Oct 2022 00:54:23 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=Yrde0ODV; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=microchip.com (client-ip=68.232.154.123; helo=esa.microchip.iphmx.com; envelope-from=conor.dooley@microchip.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=Yrde0ODV; dkim-atps=neutral Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4MtTZt6BJGz3bjg for ; Fri, 21 Oct 2022 00:53:25 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1666274006; x=1697810006; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=CezaQ6FZiRtuuhnBRuO3KdKRT5p4X9KJSGf6RIFTEQg=; b=Yrde0ODVUgkwq32IAhOK5oqCIeUGW33UChobfmoJqMCr92t8ogGP2h2N 1iZFIJJs0wfqLqGyvchs9dLJFkG+5+5XgC0d1hg02dFn4thEoUgAptQ/H TyYjlrlDgjcND1zB65gPcBBw+bPuRDH552woX7t6EGMWWclrC4JFpCXh6 2hLJIEOB7RR0MCQh41zvmC1zME1uQsJEOGZ1tHCz47FjYyw0HDSLwXF7i yNE2EgJJs4t7Siu1ogTgnbYZv29Lko08w21v2OnG5A+RoX39Rv47APtrL B+3Uf4PBj//o9QLeifqTJAuXSGlSxxKwrdF3MZBY623+4BiiCgnc0j6CJ A==; X-IronPort-AV: E=Sophos;i="5.95,198,1661842800"; d="scan'208";a="183149311" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Oct 2022 06:53:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 20 Oct 2022 06:53:09 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Thu, 20 Oct 2022 06:53:04 -0700 Date: Thu, 20 Oct 2022 14:52:48 +0100 From: Conor Dooley To: Bjorn Helgaas Subject: Re: [PATCH] PCI: Remove unnecessary of_irq.h includes Message-ID: References: <20221020134547.GA94120@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20221020134547.GA94120@bhelgaas> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Heiko Stuebner , linux-pci@vger.kernel.org, Linus Walleij , llvm@lists.linux.dev, Minghuan Lian , Thierry Reding , Thomas Petazzoni , Bharat Kumar Gogada , Toan Le , linux-riscv@lists.infradead.org, Kishon Vijay Abraham I , Rob Herring , kernel test robot , Joyce Ooi , Jonathan Hunter , bcm-kernel-feedback-list@broadcom.com, Mingkai Hu , Shawn Lin , Lorenzo Pieralisi , Ray Jui , linux-tegra@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Roy Zang , Michal Simek , kbuild-all@lists.01.org, Scott Branden , Daire McNamara , Pali =?iso-8859-1?Q?Roh=E1r?= , linux-kernel@vger.kernel.org, Tom Joseph , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote: > [+cc Pali, heads-up for trivial addition of to > pci-mvebu.c] > > On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote: > > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote: > > > Hi Bjorn, > > > > > > I love your patch! Yet something to improve: > > > > > > >> drivers/pci/controller/pcie-microchip-host.c:473:31: error: incomplete definition of type 'struct irq_domain' > > > struct mc_pcie *port = domain->host_data; > > > > That's what I get for only visually inspecting the patch before Acking > > it.. Un-ack I suppose. > > No problem! > > I think what happened is the pcie-microchip-host.c uses > irq_domain_add_linear() so it needs , but it > currently gets it via , which it doesn't otherwise > need. > > I added a preparatory patch to include explicitly, > but I haven't been able to cross-build either riscv or ia64 to verify > this fix. I'll wait a few days and post an updated series for the > 0-day bot to test. I saw you saying you couldn't find the config from LKP, FWIW a build using riscv defconfig w/ CONFIG_PCIE_MICROCHIP_HOST=y fails for me in the same way as lkp reports. Otherwise, dump the patch in response to this and I'll give it a shot later if you like? HTH, Conor. > > Same situation for pcie-altera-msi.c. > > pci-mvebu.c also relies on getting via > , but it actually depends on of_irq.h, so I'll just > add an irqdomain.h include there. > > Bjorn > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DB0EC433FE for ; Thu, 20 Oct 2022 14:19:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ji35a/UgkXcXHeNO02A3oJJzGfSOhesFypqw3ltJmb0=; b=lJP5zxEoFhxKRd AGvkbMX5GLFSGKx7lwAhZP/4vkcQvyUFuswcA2gnLFN93IBG7o153j5gMnVRv/NwKjvjoF+Y7jQn6 ApMkMqaYS07kBT8avq4XjTh1YYurAAbp9qIHIEFgzBhmQkmkXN6ObbdOjKdqRQigQeTcI4JOo5HLV 7RRdKdJD58cFDvTg1rQ8WOtYpnpV7+OX3pFcYSXAwPMSQVjcavZf/Hwu3+ZbGJ7xqbeGldGqrkXBV AGlaxt64+dOkSM525R75cOrOD0RoplGsPfVp1x9B8i2uN0R92FXtaCXl9yLn8D2AQA+ZMMHzdEgrn CvHnzcheAK/QqnLeaL4g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1olWMX-00Fzpj-6m; Thu, 20 Oct 2022 14:17:33 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1olVz1-00FmLC-Ss; Thu, 20 Oct 2022 13:53:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1666273995; x=1697809995; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=CezaQ6FZiRtuuhnBRuO3KdKRT5p4X9KJSGf6RIFTEQg=; b=vfFvKcEiJYym5gPmcMm+09rFNr2S032hz49W6DOBrMFVjvWmCAqmeWth ZQaITGLmOA96uRw64Bz8TUpSLkNpTk0bKxJztlpcXcYh3uN9ufK1PLM0q 4OG+8pknKJN5j5LcoSCbRAKxn+kZzbwhPrE0257La0DCIaXDN+CG7D8p7 haWey7bB/t0ltBM0pfBoQOPLvmvkPZZEksQf6IEWiUFMD85x0wffvyWdp 96U9/FcEVRvj6cXbnSgHDqx52JMDyxbyN7StNHUT/EKWz2MrWQi0Ac0Ke yrudQbXIKMireez0RsHZWd8+KAUKYELv8+3fU1Nr+iMY3MFX8d5GxlypK Q==; X-IronPort-AV: E=Sophos;i="5.95,198,1661842800"; d="scan'208";a="183149311" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Oct 2022 06:53:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 20 Oct 2022 06:53:09 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Thu, 20 Oct 2022 06:53:04 -0700 Date: Thu, 20 Oct 2022 14:52:48 +0100 From: Conor Dooley To: Bjorn Helgaas CC: kernel test robot , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Heiko Stuebner , , Lorenzo Pieralisi , , Minghuan Lian , Thierry Reding , Thomas Petazzoni , Bharat Kumar Gogada , Toan Le , , "Kishon Vijay Abraham I" , Rob Herring , "Linus Walleij" , Joyce Ooi , "Jonathan Hunter" , , , Shawn Lin , Ray Jui , , , Mingkai Hu , Roy Zang , Michal Simek , , Scott Branden , Daire McNamara , , Tom Joseph , , Pali =?iso-8859-1?Q?Roh=E1r?= Subject: Re: [PATCH] PCI: Remove unnecessary of_irq.h includes Message-ID: References: <20221020134547.GA94120@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221020134547.GA94120@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221020_065316_053884_9A4FABA2 X-CRM114-Status: GOOD ( 19.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote: > [+cc Pali, heads-up for trivial addition of to > pci-mvebu.c] > > On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote: > > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote: > > > Hi Bjorn, > > > > > > I love your patch! Yet something to improve: > > > > > > >> drivers/pci/controller/pcie-microchip-host.c:473:31: error: incomplete definition of type 'struct irq_domain' > > > struct mc_pcie *port = domain->host_data; > > > > That's what I get for only visually inspecting the patch before Acking > > it.. Un-ack I suppose. > > No problem! > > I think what happened is the pcie-microchip-host.c uses > irq_domain_add_linear() so it needs , but it > currently gets it via , which it doesn't otherwise > need. > > I added a preparatory patch to include explicitly, > but I haven't been able to cross-build either riscv or ia64 to verify > this fix. I'll wait a few days and post an updated series for the > 0-day bot to test. I saw you saying you couldn't find the config from LKP, FWIW a build using riscv defconfig w/ CONFIG_PCIE_MICROCHIP_HOST=y fails for me in the same way as lkp reports. Otherwise, dump the patch in response to this and I'll give it a shot later if you like? HTH, Conor. > > Same situation for pcie-altera-msi.c. > > pci-mvebu.c also relies on getting via > , but it actually depends on of_irq.h, so I'll just > add an irqdomain.h include there. > > Bjorn > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============0316042021390180409==" MIME-Version: 1.0 From: Conor Dooley To: kbuild-all@lists.01.org Subject: Re: [PATCH] PCI: Remove unnecessary of_irq.h includes Date: Thu, 20 Oct 2022 14:52:48 +0100 Message-ID: In-Reply-To: <20221020134547.GA94120@bhelgaas> List-Id: --===============0316042021390180409== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote: > [+cc Pali, heads-up for trivial addition of to > pci-mvebu.c] > = > On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote: > > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote: > > > Hi Bjorn, > > > = > > > I love your patch! Yet something to improve: > > > = > > > >> drivers/pci/controller/pcie-microchip-host.c:473:31: error: incomp= lete definition of type 'struct irq_domain' > > > struct mc_pcie *port =3D domain->host_data; > > = > > That's what I get for only visually inspecting the patch before Acking > > it.. Un-ack I suppose. > = > No problem! > = > I think what happened is the pcie-microchip-host.c uses > irq_domain_add_linear() so it needs , but it > currently gets it via , which it doesn't otherwise > need. > = > I added a preparatory patch to include explicitly, > but I haven't been able to cross-build either riscv or ia64 to verify > this fix. I'll wait a few days and post an updated series for the > 0-day bot to test. I saw you saying you couldn't find the config from LKP, FWIW a build using riscv defconfig w/ CONFIG_PCIE_MICROCHIP_HOST=3Dy fails for me in the same way as lkp reports. Otherwise, dump the patch in response to this and I'll give it a shot later if you like? HTH, Conor. > = > Same situation for pcie-altera-msi.c. > = > pci-mvebu.c also relies on getting via > , but it actually depends on of_irq.h, so I'll just > add an irqdomain.h include there. > = > Bjorn >=20 --===============0316042021390180409==--