From: Andrew Lunn <andrew@lunn.ch>
To: Fabio Estevam <festevam@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>,
Tim Harvey <tharvey@gateworks.com>,
netdev <netdev@vger.kernel.org>, Marek Vasut <marex@denx.de>,
Fabio Estevam <festevam@denx.de>
Subject: Re: Marvell 88E6320 connected to i.MX8MN
Date: Thu, 27 Oct 2022 14:32:59 +0200 [thread overview]
Message-ID: <Y1p6ex85pFapxz3s@lunn.ch> (raw)
In-Reply-To: <CAOMZO5DJAsj8-m2tEfrHn4xZdK6FE0bZepRZBrSD9=tWSSCNOA@mail.gmail.com>
> This is my devicetree:
> https://pastebin.com/raw/TagQJK2a
You have rgmii-id on both the FEC and the CPU port. So in theory you
might be getting double the needed delays? The mv88e6xxx driver will
apply these delays on the CPU port, but i don't know if the FEC does.
The other thing i've done wrong in the past with FEC is get the pinmux
wrong, so the reference clock was not muxed. Check how the reference
clock should used, is it from the switch to the FEC, or the other way
around. If the FEC is providing it, is it ticking?
Andrew
next prev parent reply other threads:[~2022-10-27 12:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 2:16 Marvell 88E6320 connected to i.MX8MN Fabio Estevam
2022-10-27 12:32 ` Andrew Lunn [this message]
2022-10-28 11:27 ` Fabio Estevam
2022-10-27 20:41 ` Vladimir Oltean
2022-10-28 2:24 ` Fabio Estevam
2022-10-28 11:58 ` Andrew Lunn
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