diff for duplicates of <Y2QJ2TuyZImbFFvi@google.com> diff --git a/a/1.txt b/N1/1.txt index be78abc..31becf7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -30,3 +30,7 @@ E.g. running a kernel built with on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM will get unexpected #UDs when trying to enable VMX. +_______________________________________________ +kvmarm mailing list +kvmarm@lists.cs.columbia.edu +https://lists.cs.columbia.edu/mailman/listinfo/kvmarm diff --git a/a/content_digest b/N1/content_digest index 67593c0..3da2293 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,9 +2,39 @@ "ref\020221102231911.3107438-34-seanjc@google.com\0" "ref\0bfa98587-3b36-3834-a4b9-585a0e0aa56a@redhat.com\0" "From\0Sean Christopherson <seanjc@google.com>\0" - "Subject\0[PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" + "Subject\0Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" "Date\0Thu, 3 Nov 2022 18:35:05 +0000\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>\0" + "Cc\0Matthew Rosato <mjrosato@linux.ibm.com>" + David Hildenbrand <david@redhat.com> + Yuan Yao <yuan.yao@intel.com> + Paul Walmsley <paul.walmsley@sifive.com> + linux-kernel@vger.kernel.org + Michael Ellerman <mpe@ellerman.id.au> + linux-riscv@lists.infradead.org + Claudio Imbrenda <imbrenda@linux.ibm.com> + kvmarm@lists.cs.columbia.edu + linux-s390@vger.kernel.org + Janosch Frank <frankja@linux.ibm.com> + Marc Zyngier <maz@kernel.org> + Huacai Chen <chenhuacai@kernel.org> + Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> + Christian Borntraeger <borntraeger@linux.ibm.com> + Chao Gao <chao.gao@intel.com> + Eric Farman <farman@linux.ibm.com> + Albert Ou <aou@eecs.berkeley.edu> + kvm@vger.kernel.org + Atish Patra <atishp@atishpatra.org> + kvmarm@lists.linux.dev + Thomas Gleixner <tglx@linutronix.de> + linux-arm-kernel@lists.infradead.org + Isaku Yamahata <isaku.yamahata@intel.com> + Fabiano Rosas <farosas@linux.ibm.com> + linux-mips@vger.kernel.org + Palmer Dabbelt <palmer@dabbelt.com> + kvm-riscv@lists.infradead.org + Vitaly Kuznetsov <vkuznets@redhat.com> + " linuxppc-dev@lists.ozlabs.org\0" "\00:1\0" "b\0" "On Thu, Nov 03, 2022, Paolo Bonzini wrote:\n" @@ -38,6 +68,10 @@ "\n" "on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set\n" "X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM\n" - will get unexpected #UDs when trying to enable VMX. + "will get unexpected #UDs when trying to enable VMX.\n" + "_______________________________________________\n" + "kvmarm mailing list\n" + "kvmarm@lists.cs.columbia.edu\n" + https://lists.cs.columbia.edu/mailman/listinfo/kvmarm -382358f5881044ba2d8d3a84ea8adf603565528e3d622c59112ac8c1b30ba5f7 +3b3aa447d492e26bf34db19d3b422956a47a7745776f60af2da49787948c345b
diff --git a/a/content_digest b/N2/content_digest index 67593c0..d2436d6 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,9 +2,44 @@ "ref\020221102231911.3107438-34-seanjc@google.com\0" "ref\0bfa98587-3b36-3834-a4b9-585a0e0aa56a@redhat.com\0" "From\0Sean Christopherson <seanjc@google.com>\0" - "Subject\0[PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" + "Subject\0Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" "Date\0Thu, 3 Nov 2022 18:35:05 +0000\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>\0" + "Cc\0Marc Zyngier <maz@kernel.org>" + Huacai Chen <chenhuacai@kernel.org> + Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> + Anup Patel <anup@brainfault.org> + Paul Walmsley <paul.walmsley@sifive.com> + Palmer Dabbelt <palmer@dabbelt.com> + Albert Ou <aou@eecs.berkeley.edu> + Christian Borntraeger <borntraeger@linux.ibm.com> + Janosch Frank <frankja@linux.ibm.com> + Claudio Imbrenda <imbrenda@linux.ibm.com> + Matthew Rosato <mjrosato@linux.ibm.com> + Eric Farman <farman@linux.ibm.com> + Vitaly Kuznetsov <vkuznets@redhat.com> + James Morse <james.morse@arm.com> + Alexandru Elisei <alexandru.elisei@arm.com> + Suzuki K Poulose <suzuki.poulose@arm.com> + Oliver Upton <oliver.upton@linux.dev> + Atish Patra <atishp@atishpatra.org> + David Hildenbrand <david@redhat.com> + kvm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvmarm@lists.linux.dev + kvmarm@lists.cs.columbia.edu + linux-mips@vger.kernel.org + linuxppc-dev@lists.ozlabs.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-s390@vger.kernel.org + linux-kernel@vger.kernel.org + Isaku Yamahata <isaku.yamahata@intel.com> + Fabiano Rosas <farosas@linux.ibm.com> + Michael Ellerman <mpe@ellerman.id.au> + Chao Gao <chao.gao@intel.com> + Thomas Gleixner <tglx@linutronix.de> + " Yuan Yao <yuan.yao@intel.com>\0" "\00:1\0" "b\0" "On Thu, Nov 03, 2022, Paolo Bonzini wrote:\n" @@ -40,4 +75,4 @@ "X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM\n" will get unexpected #UDs when trying to enable VMX. -382358f5881044ba2d8d3a84ea8adf603565528e3d622c59112ac8c1b30ba5f7 +19923916591fdd5f6a830e8e82c2958b46f96e1f4a4c504afe310d11fb4eced3
diff --git a/a/1.txt b/N3/1.txt index be78abc..9cb0572 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -30,3 +30,8 @@ E.g. running a kernel built with on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM will get unexpected #UDs when trying to enable VMX. + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N3/content_digest index 67593c0..7cac38c 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -2,9 +2,44 @@ "ref\020221102231911.3107438-34-seanjc@google.com\0" "ref\0bfa98587-3b36-3834-a4b9-585a0e0aa56a@redhat.com\0" "From\0Sean Christopherson <seanjc@google.com>\0" - "Subject\0[PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" + "Subject\0Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" "Date\0Thu, 3 Nov 2022 18:35:05 +0000\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>\0" + "Cc\0Marc Zyngier <maz@kernel.org>" + Huacai Chen <chenhuacai@kernel.org> + Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> + Anup Patel <anup@brainfault.org> + Paul Walmsley <paul.walmsley@sifive.com> + Palmer Dabbelt <palmer@dabbelt.com> + Albert Ou <aou@eecs.berkeley.edu> + Christian Borntraeger <borntraeger@linux.ibm.com> + Janosch Frank <frankja@linux.ibm.com> + Claudio Imbrenda <imbrenda@linux.ibm.com> + Matthew Rosato <mjrosato@linux.ibm.com> + Eric Farman <farman@linux.ibm.com> + Vitaly Kuznetsov <vkuznets@redhat.com> + James Morse <james.morse@arm.com> + Alexandru Elisei <alexandru.elisei@arm.com> + Suzuki K Poulose <suzuki.poulose@arm.com> + Oliver Upton <oliver.upton@linux.dev> + Atish Patra <atishp@atishpatra.org> + David Hildenbrand <david@redhat.com> + kvm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvmarm@lists.linux.dev + kvmarm@lists.cs.columbia.edu + linux-mips@vger.kernel.org + linuxppc-dev@lists.ozlabs.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-s390@vger.kernel.org + linux-kernel@vger.kernel.org + Isaku Yamahata <isaku.yamahata@intel.com> + Fabiano Rosas <farosas@linux.ibm.com> + Michael Ellerman <mpe@ellerman.id.au> + Chao Gao <chao.gao@intel.com> + Thomas Gleixner <tglx@linutronix.de> + " Yuan Yao <yuan.yao@intel.com>\0" "\00:1\0" "b\0" "On Thu, Nov 03, 2022, Paolo Bonzini wrote:\n" @@ -38,6 +73,11 @@ "\n" "on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set\n" "X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM\n" - will get unexpected #UDs when trying to enable VMX. + "will get unexpected #UDs when trying to enable VMX.\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -382358f5881044ba2d8d3a84ea8adf603565528e3d622c59112ac8c1b30ba5f7 +ffab2a3de1d37d60aec0b50f803eff834d1a62ca0efba112936bbb2b84f87b69
diff --git a/a/content_digest b/N4/content_digest index 67593c0..bfd6483 100644 --- a/a/content_digest +++ b/N4/content_digest @@ -2,9 +2,43 @@ "ref\020221102231911.3107438-34-seanjc@google.com\0" "ref\0bfa98587-3b36-3834-a4b9-585a0e0aa56a@redhat.com\0" "From\0Sean Christopherson <seanjc@google.com>\0" - "Subject\0[PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" + "Subject\0Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" "Date\0Thu, 3 Nov 2022 18:35:05 +0000\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>\0" + "Cc\0Matthew Rosato <mjrosato@linux.ibm.com>" + David Hildenbrand <david@redhat.com> + Yuan Yao <yuan.yao@intel.com> + Paul Walmsley <paul.walmsley@sifive.com> + linux-kernel@vger.kernel.org + linux-riscv@lists.infradead.org + Claudio Imbrenda <imbrenda@linux.ibm.com> + kvmarm@lists.cs.columbia.edu + linux-s390@vger.kernel.org + Janosch Frank <frankja@linux.ibm.com> + Marc Zyngier <maz@kernel.org> + Huacai Chen <chenhuacai@kernel.org> + Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> + James Morse <james.morse@arm.com> + Christian Borntraeger <borntraeger@linux.ibm.com> + Chao Gao <chao.gao@intel.com> + Eric Farman <farman@linux.ibm.com> + Albert Ou <aou@eecs.berkeley.edu> + Suzuki K Poulose <suzuki.poulose@arm.com> + kvm@vger.kernel.org + Atish Patra <atishp@atishpatra.org> + kvmarm@lists.linux.dev + Thomas Gleixner <tglx@linutronix.de> + Alexandru Elisei <alexandru.elisei@arm.com> + linux-arm-kernel@lists.infradead.org + Isaku Yamahata <isaku.yamahata@intel.com> + Fabiano Rosas <farosas@linux.ibm.com> + linux-mips@vger.kernel.org + Oliver Upton <oliver.upton@linux.dev> + Palmer Dabbelt <palmer@dabbelt.com> + kvm-riscv@lists.infradead.org + Anup Patel <anup@brainfault.org> + Vitaly Kuznetsov <vkuznets@redhat.com> + " linuxppc-dev@lists.ozlabs.org\0" "\00:1\0" "b\0" "On Thu, Nov 03, 2022, Paolo Bonzini wrote:\n" @@ -40,4 +74,4 @@ "X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM\n" will get unexpected #UDs when trying to enable VMX. -382358f5881044ba2d8d3a84ea8adf603565528e3d622c59112ac8c1b30ba5f7 +45039127c3ddf44845a6e32e4a246f3c3993df0819c3521ae02b5e6bff5be397
diff --git a/a/1.txt b/N5/1.txt index be78abc..128f201 100644 --- a/a/1.txt +++ b/N5/1.txt @@ -30,3 +30,8 @@ E.g. running a kernel built with on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM will get unexpected #UDs when trying to enable VMX. + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N5/content_digest index 67593c0..fb31125 100644 --- a/a/content_digest +++ b/N5/content_digest @@ -2,9 +2,44 @@ "ref\020221102231911.3107438-34-seanjc@google.com\0" "ref\0bfa98587-3b36-3834-a4b9-585a0e0aa56a@redhat.com\0" "From\0Sean Christopherson <seanjc@google.com>\0" - "Subject\0[PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" + "Subject\0Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code\0" "Date\0Thu, 3 Nov 2022 18:35:05 +0000\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>\0" + "Cc\0Marc Zyngier <maz@kernel.org>" + Huacai Chen <chenhuacai@kernel.org> + Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> + Anup Patel <anup@brainfault.org> + Paul Walmsley <paul.walmsley@sifive.com> + Palmer Dabbelt <palmer@dabbelt.com> + Albert Ou <aou@eecs.berkeley.edu> + Christian Borntraeger <borntraeger@linux.ibm.com> + Janosch Frank <frankja@linux.ibm.com> + Claudio Imbrenda <imbrenda@linux.ibm.com> + Matthew Rosato <mjrosato@linux.ibm.com> + Eric Farman <farman@linux.ibm.com> + Vitaly Kuznetsov <vkuznets@redhat.com> + James Morse <james.morse@arm.com> + Alexandru Elisei <alexandru.elisei@arm.com> + Suzuki K Poulose <suzuki.poulose@arm.com> + Oliver Upton <oliver.upton@linux.dev> + Atish Patra <atishp@atishpatra.org> + David Hildenbrand <david@redhat.com> + kvm@vger.kernel.org + linux-arm-kernel@lists.infradead.org + kvmarm@lists.linux.dev + kvmarm@lists.cs.columbia.edu + linux-mips@vger.kernel.org + linuxppc-dev@lists.ozlabs.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-s390@vger.kernel.org + linux-kernel@vger.kernel.org + Isaku Yamahata <isaku.yamahata@intel.com> + Fabiano Rosas <farosas@linux.ibm.com> + Michael Ellerman <mpe@ellerman.id.au> + Chao Gao <chao.gao@intel.com> + Thomas Gleixner <tglx@linutronix.de> + " Yuan Yao <yuan.yao@intel.com>\0" "\00:1\0" "b\0" "On Thu, Nov 03, 2022, Paolo Bonzini wrote:\n" @@ -38,6 +73,11 @@ "\n" "on a Cenatur or Zhaoxin CPU will leave X86_FEATURE_VMX set but not set\n" "X86_FEATURE_MSR_IA32_FEAT_CTL. If VMX isn't enabled in MSR_IA32_FEAT_CTL, KVM\n" - will get unexpected #UDs when trying to enable VMX. + "will get unexpected #UDs when trying to enable VMX.\n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -382358f5881044ba2d8d3a84ea8adf603565528e3d622c59112ac8c1b30ba5f7 +132205c688e006143aace1da4f7b204a8559eaf7ec834ecd0b0ac75f07b5bd33
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