Re: [PATCH] KVM: x86: Omit PMU MSRs from KVM_GET_MSR_INDEX_LIST if !enable_pmu

[Sean Christopherson <seanjc@google.com>]

On Thu, Nov 03, 2022, Jim Mattson wrote:
> On Thu, Nov 3, 2022 at 12:18 PM Aaron Lewis <aaronlewis@google.com> wrote:
> >
> > When the PMU is disabled, don't bother sharing the PMU MSRs with
> > userspace through KVM_GET_MSR_INDEX_LIST.  Instead, filter them out so
> > userspace doesn't have to keep track of them.
> >
> > Note that 'enable_pmu' is read-only, so userspace has no control over
> > whether the PMU MSRs are included in the list or not.
> >
> > Suggested-by: Sean Christopherson <seanjc@google.com>
> > Signed-off-by: Aaron Lewis <aaronlewis@google.com>
> > ---
> >  arch/x86/kvm/x86.c | 15 +++++++++++----
> >  1 file changed, 11 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > index 521b433f978c..19bc42a6946d 100644
> > --- a/arch/x86/kvm/x86.c
> > +++ b/arch/x86/kvm/x86.c
> > @@ -7042,13 +7042,20 @@ static void kvm_init_msr_list(void)
> >                                 continue;
> >                         break;
> >                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
> > -                       if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
> > -                           min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp))
> > +                       if ((msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
> > +                           min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp)) ||
> > +                           !enable_pmu)
> >                                 continue;
> >                         break;
> >                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
> > -                       if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
> > -                           min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp))
> > +                       if ((msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
> > +                           min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp)) ||
> > +                           !enable_pmu)
> > +                               continue;
> > +                       break;
> > +               case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
> > +               case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3:
> > +                       if (!enable_pmu)
> >                                 continue;
> >                         break;
> >                 case MSR_IA32_XFD:
> 
> I think you've missed a bunch:
> 
> MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
> MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
> MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
> MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
> MSR_IA32_PEBS_ENABLE, MSR_PEBS_DATA_CFG

Ooh, better idea!  Assuming this isn't a pressing concern, what about organizing
the MSR lists into sublists, kinda like what I proposed for VMX MSRs[*], but do
it in a generic way.  E.g. have all the PMU MSRs in a sub-list so that they can
be skipped as a group instead of needing to add a bunch of enable_pmu checks.

[*] https://lore.kernel.org/all/20220805172945.35412-3-seanjc@google.com