From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB7E6C433FE for ; Fri, 4 Nov 2022 15:26:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dYCFj/J55lVbdPnj3gPoRAL4U3zvbuhxhRFMI/knDXs=; b=AsmzeGcmqHHebm 6Zqy/1srAtLUzPA/pj6nxkwywFViheIT7Z0oAmF3pHQOK1GM7fpRbBOZeS9tCWmhhlRdh5eDmgYkW z87lqVvFoYtAMlK7Y+6wCe0q/4HG1K8VqYfhfyfR7F1GuJctY7mg9cpHFvYt+y9JvJ1z0iT1SuNMm 3p8rmxIBHLvEGzL82mtA0GkoG36wPzBzvnoFKwFEm4RPHnZ5I0zQeWljWzj24Zlwr4jzyB5ciNabA xqJCzSn8m/zIzMLSjwfhpbr9Oo369XKnklm6dhgOIR9G7KiQxAwEhh5CXQYAG5fCt4BRFOEgy35pi Q/YdZ5HmtEI9swyo0H0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqyZn-004CEX-CY; Fri, 04 Nov 2022 15:25:47 +0000 Received: from vps0.lunn.ch ([156.67.10.101]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqyZi-004CBa-E9 for linux-arm-kernel@lists.infradead.org; Fri, 04 Nov 2022 15:25:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=du3wTT7gZIcCx7MAzovG5KucdTPH1Tr3pydnZK/Rz0I=; b=46kNXdi9RR7s+GQLUwE/lyN5uE QNAC+e9tLj7U5tRxlATNLGezHv0SjgZPlhIU19uT5SK2VHL+JVpC1xJlQ2ZcvKpW1kTHaOjrzNp5j kNrSxT0EnKQEkUSbPLjBu0gTxdkdHzsa5J/eWp6yzsE9OHp4S0U58k0K/cRvHQp2mbeI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oqyZD-001RGc-Rq; Fri, 04 Nov 2022 16:25:11 +0100 Date: Fri, 4 Nov 2022 16:25:11 +0100 From: Andrew Lunn To: Sriranjani P Cc: peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, richardcochran@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chandrasekar R , Suresh Siddha Subject: Re: [PATCH 2/4] net: stmmac: dwc-qos: Add FSD EQoS support Message-ID: References: <20221104120517.77980-1-sriranjani.p@samsung.com> <20221104120517.77980-3-sriranjani.p@samsung.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221104120517.77980-3-sriranjani.p@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_082542_596579_A4B19B96 X-CRM114-Status: UNSURE ( 9.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > +static int dwc_eqos_setup_rxclock(struct platform_device *pdev) > +{ > + struct device_node *np = pdev->dev.of_node; > + > + if (np && of_property_read_bool(np, "rx-clock-mux")) { > + unsigned int reg, val; > + struct regmap *syscon = syscon_regmap_lookup_by_phandle(np, > + "rx-clock-mux"); > + > + if (IS_ERR(syscon)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux syscon!\n"); > + return PTR_ERR(syscon); > + } > + > + if (of_property_read_u32_index(np, "rx-clock-mux", 1, ®)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. offset!\n"); > + return -EINVAL; > + } > + > + if (of_property_read_u32_index(np, "rx-clock-mux", 2, &val)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. val!\n"); > + return -EINVAL; > + } > + > + regmap_write(syscon, reg, val); This appears to be one of those binds which allows any magic value to be placed into any register. That is not how DT should be used. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A190AC4332F for ; Fri, 4 Nov 2022 15:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232643AbiKDP0a (ORCPT ); Fri, 4 Nov 2022 11:26:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232597AbiKDP0J (ORCPT ); Fri, 4 Nov 2022 11:26:09 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6ED85F25; Fri, 4 Nov 2022 08:25:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=du3wTT7gZIcCx7MAzovG5KucdTPH1Tr3pydnZK/Rz0I=; b=46kNXdi9RR7s+GQLUwE/lyN5uE QNAC+e9tLj7U5tRxlATNLGezHv0SjgZPlhIU19uT5SK2VHL+JVpC1xJlQ2ZcvKpW1kTHaOjrzNp5j kNrSxT0EnKQEkUSbPLjBu0gTxdkdHzsa5J/eWp6yzsE9OHp4S0U58k0K/cRvHQp2mbeI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oqyZD-001RGc-Rq; Fri, 04 Nov 2022 16:25:11 +0100 Date: Fri, 4 Nov 2022 16:25:11 +0100 From: Andrew Lunn To: Sriranjani P Cc: peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, richardcochran@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chandrasekar R , Suresh Siddha Subject: Re: [PATCH 2/4] net: stmmac: dwc-qos: Add FSD EQoS support Message-ID: References: <20221104120517.77980-1-sriranjani.p@samsung.com> <20221104120517.77980-3-sriranjani.p@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221104120517.77980-3-sriranjani.p@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +static int dwc_eqos_setup_rxclock(struct platform_device *pdev) > +{ > + struct device_node *np = pdev->dev.of_node; > + > + if (np && of_property_read_bool(np, "rx-clock-mux")) { > + unsigned int reg, val; > + struct regmap *syscon = syscon_regmap_lookup_by_phandle(np, > + "rx-clock-mux"); > + > + if (IS_ERR(syscon)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux syscon!\n"); > + return PTR_ERR(syscon); > + } > + > + if (of_property_read_u32_index(np, "rx-clock-mux", 1, ®)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. offset!\n"); > + return -EINVAL; > + } > + > + if (of_property_read_u32_index(np, "rx-clock-mux", 2, &val)) { > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. val!\n"); > + return -EINVAL; > + } > + > + regmap_write(syscon, reg, val); This appears to be one of those binds which allows any magic value to be placed into any register. That is not how DT should be used. Andrew