From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EBB0C4321E for ; Wed, 16 Nov 2022 13:28:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233638AbiKPN2j (ORCPT ); Wed, 16 Nov 2022 08:28:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232584AbiKPN20 (ORCPT ); Wed, 16 Nov 2022 08:28:26 -0500 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CA9FB61 for ; Wed, 16 Nov 2022 05:28:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=baAFvsuLRu3L05kHwX+VC7JY3NjygqfNx32ykHoXugY=; b=dMBRzKnmzqY6NptNzMYEtdPE4K niynAGB2yLA753JlQUjIzWf180fjGair2vLZMG9fPmNy8U5zJZa7krbOp+k76QB67CTQyz5z225i/ UYV8r9CnhNg1vrQsCknL5PXRN1y+fHZQzlNCsZxdXDLAZx3DvRAJs6QjU6BNSU/OqNME=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1ovISi-002ZNr-Kx; Wed, 16 Nov 2022 14:28:20 +0100 Date: Wed, 16 Nov 2022 14:28:20 +0100 From: Andrew Lunn To: Vladimir Oltean Cc: netdev@vger.kernel.org, Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Subject: Re: [PATCH net] net: dsa: sja1105: disallow C45 transactions on the BASE-TX MDIO bus Message-ID: References: <20221116100653.3839654-1-vladimir.oltean@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221116100653.3839654-1-vladimir.oltean@nxp.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Nov 16, 2022 at 12:06:53PM +0200, Vladimir Oltean wrote: > You'd think people know that the internal 100BASE-TX PHY on the SJA1110 > responds only to clause 22 MDIO transactions, but they don't :) > > When a clause 45 transaction is attempted, sja1105_base_tx_mdio_read() > and sja1105_base_tx_mdio_write() don't expect "reg" to contain bit 30 > set (MII_ADDR_C45) and pack this value into the SPI transaction buffer. Yep, it is a common problem with MDIO busses. And driver i review now i asks for EOPNOTSUPP for clauses which are not supported, but there are old drivers out there missing such checks. I have a bit rotting patchset which completely separates C22 and C45, i just spend too much time reviewing other code to get my own merged. > Fixes: 5a8f09748ee7 ("net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TX") > Signed-off-by: Vladimir Oltean Reviewed-by: Andrew Lunn Andrew