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b=XWumqYaEWqMNBnVsg/ykzRMnmY/VHi7Ba6GO8ga97YO9 6oIJn3AKEiB5l/hoiCUjLqbMus7TQE2TePOAoIJgPrD6D7hkbHeLnWq54hSJXqhx 7O54uKBSwJCJABBAWQGkFDwBGozq5C0RHt5oRq9iIIUQ0InWVLP6FbYKgvEWoRc2 uluFz+l4vAFpNURNtQjDlQf8u40cjJo2DEHnWSDj0yUwjat3rgReHGYhf04itPMK MkCDwczeWfw03FCDhyF+IxUaCGIenmbKTjNjGU388uWPd6G2aDCeULaDPhpUmILT bo02ylNhpgjGHu9d5odBcU59EhoO5ADQ1TB6AkerTA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrgeekgdegkecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpeffhffvvefukfhfgggtuggjsehgtderredttdejnecuhfhrohhmpeforghrvghk ucforghrtgiihihkohifshhkihdqifpkrhgvtghkihcuoehmrghrmhgrrhgvkhesihhnvh hishhisghlvghthhhinhhgshhlrggsrdgtohhmqeenucggtffrrghtthgvrhhnpefgudel teefvefhfeehieetleeihfejhfeludevteetkeevtedtvdegueetfeejudenucevlhhush htvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehmrghrmhgrrhgvkhes ihhnvhhishhisghlvghthhhinhhgshhlrggsrdgtohhm X-ME-Proxy: Feedback-ID: i1568416f:Fastmail Date: Thu, 17 Nov 2022 14:13:04 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: David Vrabel Cc: linux-kernel@vger.kernel.org, Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Jan Beulich , "moderated list:XEN HYPERVISOR INTERFACE" Subject: Re: [PATCH] xen-pciback: Consider MSI-X enabled only when MASKALL bit is cleared Message-ID: References: <20221117114122.1588338-1-marmarek@invisiblethingslab.com> <0afe3f35-1b25-d1c6-89bb-8dae7a4070e9@cantab.net> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="QOL0n3NG2/pM9Yw2" Content-Disposition: inline In-Reply-To: <0afe3f35-1b25-d1c6-89bb-8dae7a4070e9@cantab.net> --QOL0n3NG2/pM9Yw2 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 17 Nov 2022 14:13:04 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: David Vrabel Cc: linux-kernel@vger.kernel.org, Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Jan Beulich , "moderated list:XEN HYPERVISOR INTERFACE" Subject: Re: [PATCH] xen-pciback: Consider MSI-X enabled only when MASKALL bit is cleared On Thu, Nov 17, 2022 at 12:54:51PM +0000, David Vrabel wrote: > On 17/11/2022 11:41, Marek Marczykowski-G=C3=B3recki wrote: > > Linux enables MSI-X before disabling INTx, but keeps MSI-X masked until > > the table is filled. Then it disables INTx just before clearing MASKALL > > bit. Currently this approach is rejected by xen-pciback. > > Allow setting PCI_MSIX_FLAGS_ENABLE while INTx is still enabled as long > > as PCI_MSIX_FLAGS_MASKALL is set too. >=20 > The use of MSI-X interrupts is conditional on only the MSI-X Enable bit. > Setting MSI-X Enable effectively overrides the Interrupt Disable bit in t= he > Command register. That means the second chunk of the patch may even drop the '(new_value & PCI_MSIX_FLAGS_MASKALL)' part, right?=20 > PCIe 6.0.1 section 7.7.2.2. "MSI-X Enable ... is prohibited from using IN= Tx > interrupts (if implemented)." And there is similar wording for MSI Enable. And this would mean the 'field_config->int_type =3D=3D INTERRUPT_TYPE_MSIX' part isn't necessary either. Jan in another thread pointed out that disabling INTx explicitly is still a useful workaround for a flawed hardware. But if that isn't mandated by the spec, maybe it doesn't need to be enforced by pciback either? > I think you need to shuffle the checks for MSI/MSI-X in > xen_pcibk_get_interrupt_type() so they are _before_ the check of the > Interrupt Disable bit in the Command register. Note the xen_pcibk_get_interrupt_type() returns a bitmask of enabled types. It seems it should consider INTx only if both MSI and MSI-X are disabled. I'll make the adjustment. But this alone, won't cover enabling part, as INTx is the only one active at the time. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --QOL0n3NG2/pM9Yw2 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmN2M2MACgkQ24/THMrX 1yy7Xgf/VXm1tljAkL14zb63jld+ZWk8SJp3bJmR29my72LkJSDRptt56K2JKUo7 Morpduk3y63d4eOWbR1QQ+Ms3fXXn6anDTweGWq3wChZZu1v4ZwWcUD1tZNBpIk2 b1dDJOIJyYBYaVN084X874y6Lt1sh8OKzbwzCB0smNtsTNSxFMUKEwTqAOLpYOxg 2QYhy3zzvrDEQPgMzCSMJV5kcJSXl8+Tkpt2RYVBu6y9VuatGYnlOSI66p/bH4t7 0i/QrAUZc7FgYWkH8gzr3M6kcOzRfHy44Ye1IS78/7Z387M3qwyLnLnS8dcuMxuX mTpZ640102hfSbQzQAT9HMY8E7PN7Q== =2Ltr -----END PGP SIGNATURE----- --QOL0n3NG2/pM9Yw2--