From mboxrd@z Thu Jan 1 00:00:00 1970 From: Conor Dooley Date: Tue, 06 Dec 2022 22:04:33 -0000 Subject: [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() In-Reply-To: <20221204174632.3677-12-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> <20221204174632.3677-12-jszhang@kernel.org> Message-ID: List-Id: To: kvm-riscv@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On Mon, Dec 05, 2022 at 01:46:30AM +0800, Jisheng Zhang wrote: > Switch cpu_relax() from statich branch to the new helper The tiniest nit: static > riscv_has_extension_likely() > > Signed-off-by: Jisheng Zhang > Reviewed-by: Andrew Jones > Reviewed-by: Heiko Stuebner > --- > arch/riscv/include/asm/vdso/processor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h > index fa70cfe507aa..edf0e25e43d1 100644 > --- a/arch/riscv/include/asm/vdso/processor.h > +++ b/arch/riscv/include/asm/vdso/processor.h > @@ -10,7 +10,7 @@ > > static inline void cpu_relax(void) > { > - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) { > + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { > #ifdef __riscv_muldiv > int dummy; > /* In lieu of a halt instruction, induce a long-latency stall. */ > -- > 2.37.2 > -------------- next part -------------- A non-text attachment was scrubbed... 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Tue, 6 Dec 2022 22:04:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670364266; bh=YFNk4wnUyvIHV45xGst0M6Mv6RD7mO9izPkpSepzLzw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CCQ8QgD9sWBXUdsklJNObETAxZWLKj/mfcGTZ8FsD1nSq7Um8QXMlrfDe6T7jUGE3 kwaHFl4KCJWaKucnZk5avrgW044opwkMLGVukvCGyfuoF4CST0/Qlk93UlIyWNa9l3 70TVGJEfq/srcImBvBAnqnHoreUaVpfIFYrpftHlM1bbrr/Jd/RUbjTSBt5eDJd7iM 8Z+87nfBkN2O9wrorSobXkA7SSK+PizEAg9TD8kRLExiyqhwtP/5lUEIswfF7jP2eU 4/Vm9Lo12OzFCvjhn1J54MVd6T8Kn5/C14RydSwvjeXrRc0WCE6odlE88JCEBOv/ps X6/mfXaNFWy9Q== Date: Tue, 6 Dec 2022 22:04:21 +0000 From: Conor Dooley To: Jisheng Zhang Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Message-ID: References: <20221204174632.3677-1-jszhang@kernel.org> <20221204174632.3677-12-jszhang@kernel.org> MIME-Version: 1.0 In-Reply-To: <20221204174632.3677-12-jszhang@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221206_140431_669388_DEEF4882 X-CRM114-Status: GOOD ( 17.91 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============0652034421009023999==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============0652034421009023999== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="f4Q+4tgBFM+GKuzY" Content-Disposition: inline --f4Q+4tgBFM+GKuzY Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Dec 05, 2022 at 01:46:30AM +0800, Jisheng Zhang wrote: > Switch cpu_relax() from statich branch to the new helper The tiniest nit: static > riscv_has_extension_likely() >=20 > Signed-off-by: Jisheng Zhang > Reviewed-by: Andrew Jones > Reviewed-by: Heiko Stuebner > --- > arch/riscv/include/asm/vdso/processor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include= /asm/vdso/processor.h > index fa70cfe507aa..edf0e25e43d1 100644 > --- a/arch/riscv/include/asm/vdso/processor.h > +++ b/arch/riscv/include/asm/vdso/processor.h > @@ -10,7 +10,7 @@ > =20 > static inline void cpu_relax(void) > { > - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTP= AUSE])) { > + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { > #ifdef __riscv_muldiv > int dummy; > /* In lieu of a halt instruction, induce a long-latency stall. */ > --=20 > 2.37.2 >=20 --f4Q+4tgBFM+GKuzY Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY4+8ZQAKCRB4tDGHoIJi 0iZSAQDn6oK5bKWljy3KIV6V3K/CWCHzkYcNsNECA5bTRZKIFwEAzfIX2k6NR1ma Wr/RIOCfc2KOx5pGO8gdBgyULr2aBAM= =Odo+ -----END PGP SIGNATURE----- --f4Q+4tgBFM+GKuzY-- --===============0652034421009023999== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============0652034421009023999==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D0C3C3A5A7 for ; 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d=kernel.org; s=k20201202; t=1670364266; bh=YFNk4wnUyvIHV45xGst0M6Mv6RD7mO9izPkpSepzLzw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CCQ8QgD9sWBXUdsklJNObETAxZWLKj/mfcGTZ8FsD1nSq7Um8QXMlrfDe6T7jUGE3 kwaHFl4KCJWaKucnZk5avrgW044opwkMLGVukvCGyfuoF4CST0/Qlk93UlIyWNa9l3 70TVGJEfq/srcImBvBAnqnHoreUaVpfIFYrpftHlM1bbrr/Jd/RUbjTSBt5eDJd7iM 8Z+87nfBkN2O9wrorSobXkA7SSK+PizEAg9TD8kRLExiyqhwtP/5lUEIswfF7jP2eU 4/Vm9Lo12OzFCvjhn1J54MVd6T8Kn5/C14RydSwvjeXrRc0WCE6odlE88JCEBOv/ps X6/mfXaNFWy9Q== Date: Tue, 6 Dec 2022 22:04:21 +0000 From: Conor Dooley To: Jisheng Zhang Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Message-ID: References: <20221204174632.3677-1-jszhang@kernel.org> <20221204174632.3677-12-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="f4Q+4tgBFM+GKuzY" Content-Disposition: inline In-Reply-To: <20221204174632.3677-12-jszhang@kernel.org> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org --f4Q+4tgBFM+GKuzY Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Dec 05, 2022 at 01:46:30AM +0800, Jisheng Zhang wrote: > Switch cpu_relax() from statich branch to the new helper The tiniest nit: static > riscv_has_extension_likely() >=20 > Signed-off-by: Jisheng Zhang > Reviewed-by: Andrew Jones > Reviewed-by: Heiko Stuebner > --- > arch/riscv/include/asm/vdso/processor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include= /asm/vdso/processor.h > index fa70cfe507aa..edf0e25e43d1 100644 > --- a/arch/riscv/include/asm/vdso/processor.h > +++ b/arch/riscv/include/asm/vdso/processor.h > @@ -10,7 +10,7 @@ > =20 > static inline void cpu_relax(void) > { > - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTP= AUSE])) { > + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { > #ifdef __riscv_muldiv > int dummy; > /* In lieu of a halt instruction, induce a long-latency stall. */ > --=20 > 2.37.2 >=20 --f4Q+4tgBFM+GKuzY Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY4+8ZQAKCRB4tDGHoIJi 0iZSAQDn6oK5bKWljy3KIV6V3K/CWCHzkYcNsNECA5bTRZKIFwEAzfIX2k6NR1ma Wr/RIOCfc2KOx5pGO8gdBgyULr2aBAM= =Odo+ -----END PGP SIGNATURE----- --f4Q+4tgBFM+GKuzY--