From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68F6EC4708C for ; Thu, 1 Dec 2022 09:40:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=v/t+rL6PVKQoQBqBq1Ijk7DZGrr5w0ceHnucPnjAhUk=; b=UXhWcN6sBzcDNd eed645c1XLvgGK4loHj7EZUfpXTVauGCbPW4DHHNlyM3M6bhI1cozs4XGLQjQevo5OyboQmljgs0P q3iExveRXDg8OGB+1MLxqhOZB+LDMExddnsuQjVTwW8erX2k7IeYucdTix9Liqe2kUQU1VZUPvgVy 3GG2dlxMbZISB8qodhwJ2EA0s3XJI+lvk7toW6kSO9yAWSE6XVaYdFFMsbYeQ26+0s04sQHpm/cei aWSGNPJtfy+TMJQHOxJSyaL5t17aB7dWmfAovyAEG61LXpZx80Bc8yBd9q2p3OkLIp2GdKAJaDF20 QpFcvjGpJUoFSEXEhAww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0g26-006Pg5-F7; Thu, 01 Dec 2022 09:39:06 +0000 Received: from mail-ed1-x52b.google.com ([2a00:1450:4864:20::52b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0g22-006PcU-Ac for linux-arm-kernel@lists.infradead.org; Thu, 01 Dec 2022 09:39:04 +0000 Received: by mail-ed1-x52b.google.com with SMTP id e13so1550709edj.7 for ; Thu, 01 Dec 2022 01:38:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:from:to:cc:subject:date:message-id:reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=iYjBDHGhNsgUIDWZGS0eXyNBSD8Mbuho5BHya7TYoNRdWarQxDVa89hNx8hCWauYNR eDFqfyrt9/RVUkpvqB+HP5TX9TGl6V0PiJfXMm+4236qMirCRSfDWI1FTU0A9wuOK3Nc rZFlcDIyT2i57NTyuT6M5CKeHkjxQ6vt2MpDw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=CYWWK1RbcTY2U2XM/j0nkR3q36Av9iNm1tq5mkFPkQjSMP4Z5I46MUeTE/yzROCDzK R/CX8tlQwC+GsRiYm1/lJhEEfr299di6Tce8eWXy2aPCvoMGFm2TjHMSX5PAA4pQ0l9+ nkNRE+owBRNk+zz41tC5B01/ZbJzYTTgrv4GCgOlJMSRiMw+H4/NQRgalRiJM2qtpK7C fxScpgpIdWc457Et7c51K7Ru1NowtpJJdT9eHSUbZBYbMazuLIz39+T6N2lqWiNQYAJy F2PIgq4sreaa6q5CCOmW8hB7ag3QmOT01N0CKSvzWR5fHmJSeObOvXYI6FvO5H7sfAfR 8Lyg== X-Gm-Message-State: ANoB5pk0/rKX4ePKUsZOlLf+VxkvG25GLJbzgkZ8kzRl+Fw8FdyL04z9 4jI4E6q71w3XyhLWWiQ0xJR3Uw== X-Google-Smtp-Source: AA0mqf4VXxeyQi4gb01ntcYKaFqwkjzYT1Z7Koygl2V0WNI6eZBrixP7Xx5zTR3IBO8OneObHs3zmA== X-Received: by 2002:a05:6402:f91:b0:469:82f7:5013 with SMTP id eh17-20020a0564020f9100b0046982f75013mr47621369edb.234.1669887536443; Thu, 01 Dec 2022 01:38:56 -0800 (PST) Received: from phenom.ffwll.local (212-51-149-33.fiber7.init7.net. [212.51.149.33]) by smtp.gmail.com with ESMTPSA id oz36-20020a1709077da400b0078d21574986sm1566185ejc.203.2022.12.01.01.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 01:38:54 -0800 (PST) Date: Thu, 1 Dec 2022 10:38:52 +0100 From: Daniel Vetter To: Randy Li Cc: Daniel Vetter , Hsia-Jun Li , dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, sakari.ailus@linux.intel.com, airlied@linux.ie, ayaka@soulik.info, linux-kernel@vger.kernel.org, tfiga@chromium.org, helen.koike@collabora.com, linux-media@vger.kernel.org, ezequiel@vanguardiasur.com.ar, tzimmermann@suse.de, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, laurent.pinchart@ideasonboard.com Subject: Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Message-ID: Mail-Followup-To: Randy Li , Hsia-Jun Li , dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, sakari.ailus@linux.intel.com, airlied@linux.ie, ayaka@soulik.info, linux-kernel@vger.kernel.org, tfiga@chromium.org, helen.koike@collabora.com, linux-media@vger.kernel.org, ezequiel@vanguardiasur.com.ar, tzimmermann@suse.de, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, laurent.pinchart@ideasonboard.com References: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> X-Operating-System: Linux phenom 5.19.0-2-amd64 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221201_013902_405914_8EDCE232 X-CRM114-Status: GOOD ( 43.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVGh1LCBEZWMgMDEsIDIwMjIgYXQgMTI6NDk6MTZBTSArMDgwMCwgUmFuZHkgTGkgd3JvdGU6 Cj4gCj4gCj4gU2VudCBmcm9tIG15IGlQYWQKPiAKPiA+IE9uIE5vdiAzMCwgMjAyMiwgYXQgNzoz MCBQTSwgRGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiB3cm90ZToKPiA+IAo+ID4g77u/ Q0FVVElPTjogRW1haWwgb3JpZ2luYXRlZCBleHRlcm5hbGx5LCBkbyBub3QgY2xpY2sgbGlua3Mg b3Igb3BlbiBhdHRhY2htZW50cyB1bmxlc3MgeW91IHJlY29nbml6ZSB0aGUgc2VuZGVyIGFuZCBr bm93IHRoZSBjb250ZW50IGlzIHNhZmUuCj4gPiAKPiA+IAo+ID4+IE9uIFdlZCwgTm92IDMwLCAy MDIyIGF0IDA1OjIxOjQ4UE0gKzA4MDAsIEhzaWEtSnVuIExpIHdyb3RlOgo+ID4+IEZyb206ICJI c2lhLUp1bihSYW5keSkgTGkiIDxyYW5keS5saUBzeW5hcHRpY3MuY29tPgo+ID4+IAo+ID4+IFRo b3NlIG1vZGlmaWVycyBvbmx5IHJlY29yZCB0aGUgcGFyYW1ldGVycyB3b3VsZCBlZmZvcnQgcGl4 ZWwKPiA+PiBsYXlvdXQgb3IgbWVtb3J5IGxheW91dC4gV2hldGhlciBwaHlzaWNhbCBtZW1vcnkg cGFnZSBtYXBwaW5nCj4gPj4gaXMgdXNlZCBpcyBub3QgYSBwYXJ0IG9mIGZvcm1hdC4KPiA+PiAK PiA+PiBTaWduZWQtb2ZmLWJ5OiBIc2lhLUp1bihSYW5keSkgTGkgPHJhbmR5LmxpQHN5bmFwdGlj cy5jb20+Cj4gPj4gLS0tCj4gPj4gaW5jbHVkZS91YXBpL2RybS9kcm1fZm91cmNjLmggfCA3NiAr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKwo+ID4+IDEgZmlsZSBjaGFuZ2VkLCA3 NiBpbnNlcnRpb25zKCspCj4gPj4gCj4gPj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvdWFwaS9kcm0v ZHJtX2ZvdXJjYy5oIGIvaW5jbHVkZS91YXBpL2RybS9kcm1fZm91cmNjLmgKPiA+PiBpbmRleCBi YzA1NmYyZDUzN2QuLmUwOTA1ZjU3M2Y0MyAxMDA2NDQKPiA+PiAtLS0gYS9pbmNsdWRlL3VhcGkv ZHJtL2RybV9mb3VyY2MuaAo+ID4+ICsrKyBiL2luY2x1ZGUvdWFwaS9kcm0vZHJtX2ZvdXJjYy5o Cj4gPj4gQEAgLTQwNyw2ICs0MDcsNyBAQCBleHRlcm4gIkMiIHsKPiA+PiAjZGVmaW5lIERSTV9G T1JNQVRfTU9EX1ZFTkRPUl9BUk0gICAgIDB4MDgKPiA+PiAjZGVmaW5lIERSTV9GT1JNQVRfTU9E X1ZFTkRPUl9BTExXSU5ORVIgMHgwOQo+ID4+ICNkZWZpbmUgRFJNX0ZPUk1BVF9NT0RfVkVORE9S X0FNTE9HSUMgMHgwYQo+ID4+ICsjZGVmaW5lIERSTV9GT1JNQVRfTU9EX1ZFTkRPUl9TWU5BUFRJ Q1MgMHgwYgo+ID4+IAo+ID4+IC8qIGFkZCBtb3JlIHRvIHRoZSBlbmQgYXMgbmVlZGVkICovCj4g Pj4gCj4gPj4gQEAgLTE1MDcsNiArMTUwOCw4MSBAQCBkcm1fZm91cmNjX2Nhbm9uaWNhbGl6ZV9u dmlkaWFfZm9ybWF0X21vZChfX3U2NCBtb2RpZmllcikKPiA+PiAjZGVmaW5lIEFNRF9GTVRfTU9E X0NMRUFSKGZpZWxkKSBcCj4gPj4gICAgICAofigoX191NjQpQU1EX0ZNVF9NT0RfIyNmaWVsZCMj X01BU0sgPDwgQU1EX0ZNVF9NT0RfIyNmaWVsZCMjX1NISUZUKSkKPiA+PiAKPiA+PiArLyoKPiA+ PiArICogU3luYXB0aWNzIFZpZGVvU21hcnQgbW9kaWZpZXJzCj4gPj4gKyAqCj4gPj4gKyAqIFRp bGVzIGNvdWxkIGJlIGFycmFuZ2VkIGluIEdyb3VwcyBvZiBUaWxlcyAoR09UcyksIGl0IGlzIGEg c21hbGwgdGlsZQo+ID4+ICsgKiB3aXRoaW4gYSB0aWxlLiBHT1Qgc2l6ZSBhbmQgbGF5b3V0IHZh cmllcyBiYXNlZCBvbiBwbGF0Zm9ybSBhbmQKPiA+PiArICogcGVyZm9ybWFuY2UgY29uY2Vybi4K PiA+PiArICoKPiA+PiArICogQmVzaWRlcywgYW4gOCBsZW5ndGggNCBieXRlcyBhcnJhcnkgKDMy IGJ5dGVzKSB3b3VsZCBiZSBuZWVkIHRvIHN0b3JlCj4gPj4gKyAqIHNvbWUgY29tcHJlc3Npb24g cGFyYW1ldGVycyBmb3IgYSBjb21wcmVzc2lvbiBtZXRhZGF0YSBwbGFuZS4KPiA+PiArICoKPiA+ PiArICogRnVydGhlciBpbmZvcm1hdGlvbiBjYW4gYmUgZm91bmQgaW4KPiA+PiArICogRG9jdW1l bnRhdGlvbi9ncHUvc3luYXB0aWNzLnJzdAo+ID4+ICsgKgo+ID4+ICsgKiAgICAgICBNYWNybwo+ ID4+ICsgKiBCaXRzICBQYXJhbSBEZXNjcmlwdGlvbgo+ID4+ICsgKiAtLS0tICAtLS0tLSAtLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLQo+ID4+ICsgKgo+ID4+ICsgKiAgNzowICBmICAgICBTY2FuIGRpcmVjdGlvbiBkZXNjcmlw dGlvbi4KPiA+PiArICoKPiA+PiArICogICAgICAgICAgICAgICAwID0gSW52YWxpZAo+ID4+ICsg KiAgICAgICAgICAgICAgIDEgPSBWNCwgdGhlIHNjYW4gd291bGQgYWx3YXlzIHN0YXJ0IGZyb20g dmVydGljYWwgZm9yIDQgcGl4ZWwKPiA+PiArICogICAgICAgICAgICAgICAgICAgdGhlbiBtb3Zl IGJhY2sgdG8gdGhlIHN0YXJ0IHBpeGVsIG9mIHRoZSBuZXh0IGhvcml6b250YWwKPiA+PiArICog ICAgICAgICAgICAgICAgICAgZGlyZWN0aW9uLgo+ID4+ICsgKiAgICAgICAgICAgICAgIDIgPSBS ZXNlcnZlZCBmb3IgZnV0dXJlIHVzZS4KPiA+PiArICoKPiA+PiArICogMTU6OCAgbSAgICAgVGhl IHRpbWVzIG9mIHBhdHRlcm4gcmVwZWF0IGluIHRoZSByaWdodCBhbmdsZSBkaXJlY3Rpb24gZnJv bQo+ID4+ICsgKiAgICAgICAgICAgICB0aGUgZmlyc3Qgc2NhbiBkaXJlY3Rpb24uCj4gPj4gKyAq Cj4gPj4gKyAqIDE5OjE2IHAgICAgIFRoZSBwYWRkaW5nIGJpdHMgYWZ0ZXIgdGhlIHdob2xlIHNj YW4sIGNvdWxkIGJlIHplcm8uCj4gPj4gKyAqCj4gPj4gKyAqIDIwOjIwIGcgICAgIEdPVCBwYWNr aW5nIGZsYWcuCj4gPj4gKyAqCj4gPj4gKyAqIDIzOjIxIC0gICAgIFJlc2VydmVkIGZvciBmdXR1 cmUgdXNlLiAgTXVzdCBiZSB6ZXJvLgo+ID4gCj4gPiBDYW4geW91IHBscyBmb2xkIGFsbCB0aGUg ZnV0dXJlIHVzZSByZXNlcnZhdGlvbnMgaW50byB0aGUgdG9wIGVuZD8KPiBZb3Ugc2VlIHdlIGNv dWxkIHB1dCBtb3JlIHJlbGF0ZWQgZmxhZyBpbiBlYWNoIG9mIHJlc2VydmVkIGFyZWEuCj4gSGVy ZSBpcyBmb3IgdGhlIGdyb3VwIG9mIHRpbGVzIGZsYWcuCj4gQml0IDM1IHRvIDMyIGNvdWxkIGJl IHVzZWQgZm9yIGRlc2NyaWJpbmcgdGhlIGRpbWVuc2lvbiBvZiB0aGUgZ3JvdXAgb2YgdGlsZXMu CgpPaCBhbHNvIG9uIHRoZSBkaW1lbnNpb24gdGhpbmcsIHRoaXMgaXMgdGhlIHRpbGUgc2l6ZSBh bmQgaGFzIG5vdGhpbmcgdG8KZG8gd2l0aCB0aGUgb3ZlcmFsbCBidWZmZXIgc2l6ZSwgcmlnaHQ/ IEJlY2F1c2UgdGhlIG92ZXJhbGwgYnVmZmVyIHNpemUgaXMKbWVhbnQgdG8gYmUgY2FycmllZCBp biBzZXBhcmF0ZSBtZXRhZGF0YSAobGlrZSB0aGUgZHJtX2ZyYW1lYnVmZmVyCnN0cnVjdHVyZSBv ciBBRERGQjIgaW9jdGwgZGF0YSkuIGRybSBmb3VyY2MvbW9kaWZpZXIgYXNzdW1lIHRoYXQgaGVp Z2h0LAp3aWR0aCwgb2Zmc2V0IGFuZCBzdHJpZGUgYXJlIHNwZWNpZmllZCBwZXIgcGxhbmUgYWxy ZWFkeSAodW5sZXNzIHRoZQphdXhpYXJ5IHBsYW5lIGhhcyBhIGZpeGVkIGxheW91dCBhbmQgaXMg bm90IHRyYWNrZWQgYXMgYSBzZXBhcmF0ZSBwbGFuZQpmb3IgdGhpcyBmb3JtYXQpLgoKPiA+IEFs c28gSQo+ID4gdGhpbmsgaXQnZCBiZSBnb29kIHRvIGF0IGxlYXN0IHJlc2VydmUgbWF5YmUgdGhl IHRvcCA4IGJpdHMgb3Igc28gZm9yIGEKPiA+IHN5bmFwdGljcyBzcGVjaWZpYyBmb3JtYXQgaW5k aWNhdG9yLCBzbyB0aGF0IGl0J3MgZWFzaWVyIHRvIGV4dGVuZCB0aGlzIGluCj4gPiB0aGUgZnV0 dXJlIC4uLgo+IEkgdGhpbmsgdGhlICBiaXQgNTYgdG8gNjMgYXJlIHVzZWQgZm9yIHN0b3Jpbmcg dGhlIHZlbmRvciBpZC4gVGhhdCBpcyB3aHkgSSBkaWRu4oCZdCBpbmNsdWRlIHRoZW0gYmVsb3cu IE9yIHlvdSBtZWFuIHRoZSBiaXQgNyB0byAwPwo+IERvIHlvCgpZZWFoIHRoZXJlJ3MgOCBiaXQg dmVuZG9yIGlkLCBidXQgeW91IGNvdWxkIHJlc2VydmUgYW5vdGhlciA4IGJpdCBhdCB0aGUKdG9w IChzbyA0ODo1NSBvciBzb21ldGhpbmcgbGlrZSB0aGF0KSB0byBlbnVtZXJhdGUgd2l0aGluIHRo ZSBzeW5hcHRpY3MKc3BhY2UuIEp1c3QgdG8gZnV0dXJlIHByb29mIHRoZSBzY2hlbWEsIGJlY2F1 c2UgZXhwZXJpZW5jZSBzYXlzIHRoYXQgaHcKZW5naW5lZXJzIGFic29sdXRlbHkgZG8gbG92ZSB0 byBjaGFuZ2UgdGhpcyBzdHVmZiBldmVudHVhbGx5LgotRGFuaWVsCgo+ID4gLURhbmllbAo+ID4g Cj4gPiAKPiA+PiArICoKPiA+PiArICogMjc6MjQgaCAgICAgbG9nMihob3Jpem9udGFsKSBvZiBw aXhlbHMsIGluIEdPVHMuCj4gPj4gKyAqCj4gPj4gKyAqIDMxOjI4IHYgICAgIGxvZzIodmVydGlj YWwpIG9mIHBpeGVscywgaW4gR09Ucy4KPiA+PiArICoKPiA+PiArICogMzU6MzIgLSAgICAgUmVz ZXJ2ZWQgZm9yIGZ1dHVyZSB1c2UuICBNdXN0IGJlIHplcm8uCj4gPj4gKyAqCj4gPj4gKyAqIDM2 OjM2IGMgICAgIENvbXByZXNzaW9uIGZsYWcuCj4gPj4gKyAqCj4gPj4gKyAqIDU1OjM3IC0gICAg IFJlc2VydmVkIGZvciBmdXR1cmUgdXNlLiAgTXVzdCBiZSB6ZXJvLgo+ID4+ICsgKgo+ID4+ICsg Ki8KPiA+PiArCj4gPj4gKyNkZWZpbmUgRFJNX0ZPUk1BVF9NT0RfU1lOQV9WNF9USUxFRCAgICAg ICAgIGZvdXJjY19tb2RfY29kZShTWU5BUFRJQ1MsIDEpCj4gPj4gKwo+ID4+ICsjZGVmaW5lIERS TV9GT1JNQVRfTU9EX1NZTkFfTVRSX0xJTkVBUl8yRChmLCBtLCBwLCBnLCBoLCB2LCBjKSBcCj4g Pj4gKyAgICAgZm91cmNjX21vZF9jb2RlKFNZTkFQVElDUywgKChfX3U2NCkoKGYpICYgMHhmZikg fCBcCj4gPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICgoX191NjQpKChtKSAmIDB4 ZmYpIDw8IDgpIHwgXAo+ID4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAoKF9fdTY0 KSgocCkgJiAweGYpIDw8IDE2KSB8IFwKPiA+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgKChfX3U2NCkoKGcpICYgMHgxKSA8PCAyMCkgfCBcCj4gPj4gKyAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICgoX191NjQpKChoKSAmIDB4ZikgPDwgMjQpIHwgXAo+ID4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAoKF9fdTY0KSgodikgJiAweGYpIDw8IDI4KSB8IFwKPiA+ PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgKChfX3U2NCkoKGMpICYgMHgxKSA8PCAz NikpKQo+ID4+ICsKPiA+PiArI2RlZmluZSBEUk1fRk9STUFUX01PRF9TWU5BX1Y0SDEgXAo+ID4+ ICsgICAgIERSTV9GT1JNQVRfTU9EX1NZTkFfTVRSX0xJTkVBUl8yRCgxLCAxLCAwLCAwLCAwLCAw LCAwKQo+ID4+ICsKPiA+PiArI2RlZmluZSBEUk1fRk9STUFUX01PRF9TWU5BX1Y0SDNQOCBcCj4g Pj4gKyAgICAgRFJNX0ZPUk1BVF9NT0RfU1lOQV9NVFJfTElORUFSXzJEKDEsIDMsIDgsIDAsIDAs IDAsIDApCj4gPj4gKwo+ID4+ICsjZGVmaW5lIERSTV9GT1JNQVRfTU9EX1NZTkFfVjRIMV82NEw0 X0NPTVBSRVNTRUQgXAo+ID4+ICsgICAgIERSTV9GT1JNQVRfTU9EX1NZTkFfTVRSX0xJTkVBUl8y RCgxLCAxLCAwLCAxLCA2LCAyLCAxKQo+ID4+ICsKPiA+PiArI2RlZmluZSBEUk1fRk9STUFUX01P RF9TWU5BX1Y0SDNQOF82NEw0X0NPTVBSRVNTRUQgXAo+ID4+ICsgICAgIERSTV9GT1JNQVRfTU9E X1NZTkFfTVRSX0xJTkVBUl8yRCgxLCAzLCA4LCAxLCA2LCAyLCAxKQo+ID4+ICsKPiA+PiArI2Rl ZmluZSBEUk1fRk9STUFUX01PRF9TWU5BX1Y0SDFfMTI4TDEyOF9DT01QUkVTU0VEIFwKPiA+PiAr ICAgICBEUk1fRk9STUFUX01PRF9TWU5BX01UUl9MSU5FQVJfMkQoMSwgMSwgMCwgMSwgNywgNywg MSkKPiA+PiArCj4gPj4gKyNkZWZpbmUgRFJNX0ZPUk1BVF9NT0RfU1lOQV9WNEgzUDhfMTI4TDEy OF9DT01QUkVTU0VEIFwKPiA+PiArICAgICBEUk1fRk9STUFUX01PRF9TWU5BX01UUl9MSU5FQVJf MkQoMSwgMywgOCwgMSwgNywgNywgMSkKPiA+PiArCj4gPj4gI2lmIGRlZmluZWQoX19jcGx1c3Bs dXMpCj4gPj4gfQo+ID4+ICNlbmRpZgo+ID4+IC0tCj4gPj4gMi4zNy4zCj4gPj4gCj4gPiAKPiA+ IC0tCj4gPiBEYW5pZWwgVmV0dGVyCj4gPiBTb2Z0d2FyZSBFbmdpbmVlciwgSW50ZWwgQ29ycG9y YXRpb24KPiA+IGh0dHBzOi8vdXJsZGVmZW5zZS5wcm9vZnBvaW50LmNvbS92Mi91cmw/dT1odHRw LTNBX19ibG9nLmZmd2xsLmNoJmQ9RHdJQkFnJmM9N2RmQko4Y1hiV2poYzBCaEltdTh3VklvVUZt QnpqMXM4OHI4RUd5TTBVWSZyPVA0eGIyXzdiaXFCeEQ0TEdHUHJTVjZqLWpmM0MzeGxSN1BYVS1t TFRlWkUmbT1kMW1nSFdjLUl0RFhLOWRTbnowV0dZczl4b1hUVGs5THFiaWZNdG4yTE94bWFISHNj NGllQ29FNzhCRmtISTFpJnM9OHB0cVB6VFV3YjNYM2ZCU3lRQTZuVkFBNkRjaHViVVVzTVJnbUxJ cDFsWSZlPQoKLS0gCkRhbmllbCBWZXR0ZXIKU29mdHdhcmUgRW5naW5lZXIsIEludGVsIENvcnBv cmF0aW9uCmh0dHA6Ly9ibG9nLmZmd2xsLmNoCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1h cm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcv bWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 621EAC4708C for ; Thu, 1 Dec 2022 09:39:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8129C10E582; Thu, 1 Dec 2022 09:39:01 +0000 (UTC) Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by gabe.freedesktop.org (Postfix) with ESMTPS id 61AD610E582 for ; Thu, 1 Dec 2022 09:38:58 +0000 (UTC) Received: by mail-ed1-x52c.google.com with SMTP id z92so1632653ede.1 for ; Thu, 01 Dec 2022 01:38:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:from:to:cc:subject:date:message-id:reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=iYjBDHGhNsgUIDWZGS0eXyNBSD8Mbuho5BHya7TYoNRdWarQxDVa89hNx8hCWauYNR eDFqfyrt9/RVUkpvqB+HP5TX9TGl6V0PiJfXMm+4236qMirCRSfDWI1FTU0A9wuOK3Nc rZFlcDIyT2i57NTyuT6M5CKeHkjxQ6vt2MpDw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=scvxymTLC9O9g9PhuPmPkEyrYn/x9dCXGQXNqq4XzY0xRzsTd39b5HkRaoL0FdM735 255mLwoXXM3mjoP2E/80tdyRALyaFTnkGRgUUfL8aT9+DmgTZXfXVX/VN/fsY4s9Kvy6 7LBOCqxFuj/NI4wd0CXbg1yoWk58w5ocn4FMBxVlaHoTN0iREbhOC0L9JSzVaj9Ske8N L3SDTTdCm82TM3KyC3afJ4wXz3uCZhG76Uqco203qKKWwQ5uMi+fEguwcxG9owpLT5Lx +/Fxxv5ODvUp4ywqeYHwDIIe0nzwrYV+X8FG64HljKbtH5tb/8M7YoifoSbbTbEtr/C9 IZQw== X-Gm-Message-State: ANoB5pkSdd4h1N96ojN/P4T6aDcGRfR9jDR8UkygfLI9lbxRtUu34iuh dAGTLWNajFLOAlkDg9KuDjk0kQ== X-Google-Smtp-Source: AA0mqf4VXxeyQi4gb01ntcYKaFqwkjzYT1Z7Koygl2V0WNI6eZBrixP7Xx5zTR3IBO8OneObHs3zmA== X-Received: by 2002:a05:6402:f91:b0:469:82f7:5013 with SMTP id eh17-20020a0564020f9100b0046982f75013mr47621369edb.234.1669887536443; Thu, 01 Dec 2022 01:38:56 -0800 (PST) Received: from phenom.ffwll.local (212-51-149-33.fiber7.init7.net. [212.51.149.33]) by smtp.gmail.com with ESMTPSA id oz36-20020a1709077da400b0078d21574986sm1566185ejc.203.2022.12.01.01.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 01:38:54 -0800 (PST) Date: Thu, 1 Dec 2022 10:38:52 +0100 From: Daniel Vetter To: Randy Li Subject: Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Message-ID: Mail-Followup-To: Randy Li , Hsia-Jun Li , dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, sakari.ailus@linux.intel.com, airlied@linux.ie, ayaka@soulik.info, linux-kernel@vger.kernel.org, tfiga@chromium.org, helen.koike@collabora.com, linux-media@vger.kernel.org, ezequiel@vanguardiasur.com.ar, tzimmermann@suse.de, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, laurent.pinchart@ideasonboard.com References: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> X-Operating-System: Linux phenom 5.19.0-2-amd64 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mchehab@kernel.org, laurent.pinchart@ideasonboard.com, airlied@linux.ie, tzimmermann@suse.de, ayaka@soulik.info, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, Hsia-Jun Li , helen.koike@collabora.com, ezequiel@vanguardiasur.com.ar, sakari.ailus@linux.intel.com, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, tfiga@chromium.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, Dec 01, 2022 at 12:49:16AM +0800, Randy Li wrote: > > > Sent from my iPad > > > On Nov 30, 2022, at 7:30 PM, Daniel Vetter wrote: > > > > CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. > > > > > >> On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: > >> From: "Hsia-Jun(Randy) Li" > >> > >> Those modifiers only record the parameters would effort pixel > >> layout or memory layout. Whether physical memory page mapping > >> is used is not a part of format. > >> > >> Signed-off-by: Hsia-Jun(Randy) Li > >> --- > >> include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ > >> 1 file changed, 76 insertions(+) > >> > >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > >> index bc056f2d537d..e0905f573f43 100644 > >> --- a/include/uapi/drm/drm_fourcc.h > >> +++ b/include/uapi/drm/drm_fourcc.h > >> @@ -407,6 +407,7 @@ extern "C" { > >> #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 > >> #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 > >> #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a > >> +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b > >> > >> /* add more to the end as needed */ > >> > >> @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > >> #define AMD_FMT_MOD_CLEAR(field) \ > >> (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > >> > >> +/* > >> + * Synaptics VideoSmart modifiers > >> + * > >> + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile > >> + * within a tile. GOT size and layout varies based on platform and > >> + * performance concern. > >> + * > >> + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store > >> + * some compression parameters for a compression metadata plane. > >> + * > >> + * Further information can be found in > >> + * Documentation/gpu/synaptics.rst > >> + * > >> + * Macro > >> + * Bits Param Description > >> + * ---- ----- ----------------------------------------------------------------- > >> + * > >> + * 7:0 f Scan direction description. > >> + * > >> + * 0 = Invalid > >> + * 1 = V4, the scan would always start from vertical for 4 pixel > >> + * then move back to the start pixel of the next horizontal > >> + * direction. > >> + * 2 = Reserved for future use. > >> + * > >> + * 15:8 m The times of pattern repeat in the right angle direction from > >> + * the first scan direction. > >> + * > >> + * 19:16 p The padding bits after the whole scan, could be zero. > >> + * > >> + * 20:20 g GOT packing flag. > >> + * > >> + * 23:21 - Reserved for future use. Must be zero. > > > > Can you pls fold all the future use reservations into the top end? > You see we could put more related flag in each of reserved area. > Here is for the group of tiles flag. > Bit 35 to 32 could be used for describing the dimension of the group of tiles. Oh also on the dimension thing, this is the tile size and has nothing to do with the overall buffer size, right? Because the overall buffer size is meant to be carried in separate metadata (like the drm_framebuffer structure or ADDFB2 ioctl data). drm fourcc/modifier assume that height, width, offset and stride are specified per plane already (unless the auxiary plane has a fixed layout and is not tracked as a separate plane for this format). > > Also I > > think it'd be good to at least reserve maybe the top 8 bits or so for a > > synaptics specific format indicator, so that it's easier to extend this in > > the future ... > I think the bit 56 to 63 are used for storing the vendor id. That is why I didn’t include them below. Or you mean the bit 7 to 0? > Do yo Yeah there's 8 bit vendor id, but you could reserve another 8 bit at the top (so 48:55 or something like that) to enumerate within the synaptics space. Just to future proof the schema, because experience says that hw engineers absolutely do love to change this stuff eventually. -Daniel > > -Daniel > > > > > >> + * > >> + * 27:24 h log2(horizontal) of pixels, in GOTs. > >> + * > >> + * 31:28 v log2(vertical) of pixels, in GOTs. > >> + * > >> + * 35:32 - Reserved for future use. Must be zero. > >> + * > >> + * 36:36 c Compression flag. > >> + * > >> + * 55:37 - Reserved for future use. Must be zero. > >> + * > >> + */ > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ > >> + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ > >> + ((__u64)((m) & 0xff) << 8) | \ > >> + ((__u64)((p) & 0xf) << 16) | \ > >> + ((__u64)((g) & 0x1) << 20) | \ > >> + ((__u64)((h) & 0xf) << 24) | \ > >> + ((__u64)((v) & 0xf) << 28) | \ > >> + ((__u64)((c) & 0x1) << 36))) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) > >> + > >> #if defined(__cplusplus) > >> } > >> #endif > >> -- > >> 2.37.3 > >> > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIBAg&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=P4xb2_7biqBxD4LGGPrSV6j-jf3C3xlR7PXU-mLTeZE&m=d1mgHWc-ItDXK9dSnz0WGYs9xoXTTk9LqbifMtn2LOxmaHHsc4ieCoE78BFkHI1i&s=8ptqPzTUwb3X3fBSyQA6nVAA6DchubUUsMRgmLIp1lY&e= -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1E11C43217 for ; Thu, 1 Dec 2022 09:39:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230173AbiLAJjA (ORCPT ); Thu, 1 Dec 2022 04:39:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229661AbiLAJi7 (ORCPT ); Thu, 1 Dec 2022 04:38:59 -0500 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E3CA4E439 for ; Thu, 1 Dec 2022 01:38:58 -0800 (PST) Received: by mail-ed1-x52a.google.com with SMTP id d20so1667094edn.0 for ; Thu, 01 Dec 2022 01:38:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:from:to:cc:subject:date:message-id:reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=iYjBDHGhNsgUIDWZGS0eXyNBSD8Mbuho5BHya7TYoNRdWarQxDVa89hNx8hCWauYNR eDFqfyrt9/RVUkpvqB+HP5TX9TGl6V0PiJfXMm+4236qMirCRSfDWI1FTU0A9wuOK3Nc rZFlcDIyT2i57NTyuT6M5CKeHkjxQ6vt2MpDw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:mail-followup-to:message-id:subject:cc:to :from:date:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7t9ZrLLQSDRq9AIwJu2BnegciMpPDsrwOM0+JjQaOx4=; b=b16Lvyek2RfrySIC8N7OZQYcsz76mHB0ho0EF0PefDAq5qO3hPUwWd23xw6L4TiQFY 4u1hHMQM8s0PKV8PJlsBEn8P3bdw5ZP0o6HgdlzYi372a1QUx+T5RPSUYkMUuXfEk31j gTTDfoZAMGvhoKfI0CuF4LzGtlLDY4F6PFj9k/+LVR+5JvQEWOr1tSPTW9JYfftAzvb5 D83PyNb75mSmlpMfUXyT3YAFcsvBDzH5xjNYkCK/+r+gwjr5CZSTwJy4CdpxteHvhzy9 af2aE8Wc5euIes/uGJdt9uPahQMaMkWtCX7n+2BCIJgjG7HIXttVTHKGzGbdgwNp3OUm bNeA== X-Gm-Message-State: ANoB5plCTx/ZVvf2qtLrcOy6do5/4p8Umc6sXB0iohay2o4bVd7sDztl 5sTkjI1WIglhX4fVduQ+zXFdhQ== X-Google-Smtp-Source: AA0mqf4VXxeyQi4gb01ntcYKaFqwkjzYT1Z7Koygl2V0WNI6eZBrixP7Xx5zTR3IBO8OneObHs3zmA== X-Received: by 2002:a05:6402:f91:b0:469:82f7:5013 with SMTP id eh17-20020a0564020f9100b0046982f75013mr47621369edb.234.1669887536443; Thu, 01 Dec 2022 01:38:56 -0800 (PST) Received: from phenom.ffwll.local (212-51-149-33.fiber7.init7.net. [212.51.149.33]) by smtp.gmail.com with ESMTPSA id oz36-20020a1709077da400b0078d21574986sm1566185ejc.203.2022.12.01.01.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 01:38:54 -0800 (PST) Date: Thu, 1 Dec 2022 10:38:52 +0100 From: Daniel Vetter To: Randy Li Cc: Daniel Vetter , Hsia-Jun Li , dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, sakari.ailus@linux.intel.com, airlied@linux.ie, ayaka@soulik.info, linux-kernel@vger.kernel.org, tfiga@chromium.org, helen.koike@collabora.com, linux-media@vger.kernel.org, ezequiel@vanguardiasur.com.ar, tzimmermann@suse.de, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, laurent.pinchart@ideasonboard.com Subject: Re: [PATCH v5 1/2] drm/fourcc: Add Synaptics VideoSmart tiled modifiers Message-ID: Mail-Followup-To: Randy Li , Hsia-Jun Li , dri-devel@lists.freedesktop.org, nicolas@ndufresne.ca, sakari.ailus@linux.intel.com, airlied@linux.ie, ayaka@soulik.info, linux-kernel@vger.kernel.org, tfiga@chromium.org, helen.koike@collabora.com, linux-media@vger.kernel.org, ezequiel@vanguardiasur.com.ar, tzimmermann@suse.de, ribalda@chromium.org, sebastian.hesselbarth@gmail.com, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, laurent.pinchart@ideasonboard.com References: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <0D62976C-77E2-4748-AA90-C50D5E2CA48C@synaptics.com> X-Operating-System: Linux phenom 5.19.0-2-amd64 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org On Thu, Dec 01, 2022 at 12:49:16AM +0800, Randy Li wrote: > > > Sent from my iPad > > > On Nov 30, 2022, at 7:30 PM, Daniel Vetter wrote: > > > > CAUTION: Email originated externally, do not click links or open attachments unless you recognize the sender and know the content is safe. > > > > > >> On Wed, Nov 30, 2022 at 05:21:48PM +0800, Hsia-Jun Li wrote: > >> From: "Hsia-Jun(Randy) Li" > >> > >> Those modifiers only record the parameters would effort pixel > >> layout or memory layout. Whether physical memory page mapping > >> is used is not a part of format. > >> > >> Signed-off-by: Hsia-Jun(Randy) Li > >> --- > >> include/uapi/drm/drm_fourcc.h | 76 +++++++++++++++++++++++++++++++++++ > >> 1 file changed, 76 insertions(+) > >> > >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > >> index bc056f2d537d..e0905f573f43 100644 > >> --- a/include/uapi/drm/drm_fourcc.h > >> +++ b/include/uapi/drm/drm_fourcc.h > >> @@ -407,6 +407,7 @@ extern "C" { > >> #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 > >> #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 > >> #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a > >> +#define DRM_FORMAT_MOD_VENDOR_SYNAPTICS 0x0b > >> > >> /* add more to the end as needed */ > >> > >> @@ -1507,6 +1508,81 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > >> #define AMD_FMT_MOD_CLEAR(field) \ > >> (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > >> > >> +/* > >> + * Synaptics VideoSmart modifiers > >> + * > >> + * Tiles could be arranged in Groups of Tiles (GOTs), it is a small tile > >> + * within a tile. GOT size and layout varies based on platform and > >> + * performance concern. > >> + * > >> + * Besides, an 8 length 4 bytes arrary (32 bytes) would be need to store > >> + * some compression parameters for a compression metadata plane. > >> + * > >> + * Further information can be found in > >> + * Documentation/gpu/synaptics.rst > >> + * > >> + * Macro > >> + * Bits Param Description > >> + * ---- ----- ----------------------------------------------------------------- > >> + * > >> + * 7:0 f Scan direction description. > >> + * > >> + * 0 = Invalid > >> + * 1 = V4, the scan would always start from vertical for 4 pixel > >> + * then move back to the start pixel of the next horizontal > >> + * direction. > >> + * 2 = Reserved for future use. > >> + * > >> + * 15:8 m The times of pattern repeat in the right angle direction from > >> + * the first scan direction. > >> + * > >> + * 19:16 p The padding bits after the whole scan, could be zero. > >> + * > >> + * 20:20 g GOT packing flag. > >> + * > >> + * 23:21 - Reserved for future use. Must be zero. > > > > Can you pls fold all the future use reservations into the top end? > You see we could put more related flag in each of reserved area. > Here is for the group of tiles flag. > Bit 35 to 32 could be used for describing the dimension of the group of tiles. Oh also on the dimension thing, this is the tile size and has nothing to do with the overall buffer size, right? Because the overall buffer size is meant to be carried in separate metadata (like the drm_framebuffer structure or ADDFB2 ioctl data). drm fourcc/modifier assume that height, width, offset and stride are specified per plane already (unless the auxiary plane has a fixed layout and is not tracked as a separate plane for this format). > > Also I > > think it'd be good to at least reserve maybe the top 8 bits or so for a > > synaptics specific format indicator, so that it's easier to extend this in > > the future ... > I think the bit 56 to 63 are used for storing the vendor id. That is why I didn’t include them below. Or you mean the bit 7 to 0? > Do yo Yeah there's 8 bit vendor id, but you could reserve another 8 bit at the top (so 48:55 or something like that) to enumerate within the synaptics space. Just to future proof the schema, because experience says that hw engineers absolutely do love to change this stuff eventually. -Daniel > > -Daniel > > > > > >> + * > >> + * 27:24 h log2(horizontal) of pixels, in GOTs. > >> + * > >> + * 31:28 v log2(vertical) of pixels, in GOTs. > >> + * > >> + * 35:32 - Reserved for future use. Must be zero. > >> + * > >> + * 36:36 c Compression flag. > >> + * > >> + * 55:37 - Reserved for future use. Must be zero. > >> + * > >> + */ > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4_TILED fourcc_mod_code(SYNAPTICS, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(f, m, p, g, h, v, c) \ > >> + fourcc_mod_code(SYNAPTICS, ((__u64)((f) & 0xff) | \ > >> + ((__u64)((m) & 0xff) << 8) | \ > >> + ((__u64)((p) & 0xf) << 16) | \ > >> + ((__u64)((g) & 0x1) << 20) | \ > >> + ((__u64)((h) & 0xf) << 24) | \ > >> + ((__u64)((v) & 0xf) << 28) | \ > >> + ((__u64)((c) & 0x1) << 36))) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8 \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 0, 0, 0, 0) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_64L4_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 6, 2, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H1_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 1, 0, 1, 7, 7, 1) > >> + > >> +#define DRM_FORMAT_MOD_SYNA_V4H3P8_128L128_COMPRESSED \ > >> + DRM_FORMAT_MOD_SYNA_MTR_LINEAR_2D(1, 3, 8, 1, 7, 7, 1) > >> + > >> #if defined(__cplusplus) > >> } > >> #endif > >> -- > >> 2.37.3 > >> > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > https://urldefense.proofpoint.com/v2/url?u=http-3A__blog.ffwll.ch&d=DwIBAg&c=7dfBJ8cXbWjhc0BhImu8wVIoUFmBzj1s88r8EGyM0UY&r=P4xb2_7biqBxD4LGGPrSV6j-jf3C3xlR7PXU-mLTeZE&m=d1mgHWc-ItDXK9dSnz0WGYs9xoXTTk9LqbifMtn2LOxmaHHsc4ieCoE78BFkHI1i&s=8ptqPzTUwb3X3fBSyQA6nVAA6DchubUUsMRgmLIp1lY&e= -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch