From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBA49C4167B for ; Sun, 18 Dec 2022 21:48:16 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.465703.724492 (Exim 4.92) (envelope-from ) id 1p71Vv-0000lI-Q7; Sun, 18 Dec 2022 21:48:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 465703.724492; Sun, 18 Dec 2022 21:48:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1p71Vv-0000lB-NF; Sun, 18 Dec 2022 21:48:07 +0000 Received: by outflank-mailman (input) for mailman id 465703; Sun, 18 Dec 2022 21:48:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1p71Vu-0000ke-4H for xen-devel@lists.xenproject.org; Sun, 18 Dec 2022 21:48:06 +0000 Received: from mailhost.m5p.com (mailhost.m5p.com [74.104.188.4]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a4f1e13a-7f1d-11ed-8fd4-01056ac49cbb; Sun, 18 Dec 2022 22:48:03 +0100 (CET) Received: from m5p.com (mailhost.m5p.com [IPv6:2001:470:1f07:15ff:0:0:0:f7]) by mailhost.m5p.com (8.16.1/8.15.2) with ESMTPS id 2BILllPq066332 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Sun, 18 Dec 2022 16:47:53 -0500 (EST) (envelope-from ehem@m5p.com) Received: (from ehem@localhost) by m5p.com (8.16.1/8.15.2/Submit) id 2BILli7o066331; Sun, 18 Dec 2022 13:47:44 -0800 (PST) (envelope-from ehem) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a4f1e13a-7f1d-11ed-8fd4-01056ac49cbb Date: Sun, 18 Dec 2022 13:47:44 -0800 From: Elliott Mitchell To: Neowutran Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Roger Pau =?iso-8859-1?Q?Monn=E9?= , Wei Liu Subject: Re: [PATCH v2] Bug fix - Integer overflow when cpu frequency > u32 max value. Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Sun, Dec 18, 2022 at 01:14:07PM +0100, Neowutran wrote: > xen/x86: prevent overflow with high frequency TSCs > > Promote tsc_khz to a 64-bit type before multiplying by 1000 to avoid a > 'overflow before widen' bug. > Otherwise just above 4.294GHz the value will overflow. > Processors with clocks this high are now in production and require this to work > correctly. > > Signed-off-by: Neowutran Needing a bit of word-wrapping, but that can be adjusted during commit to the Xen tree. This strikes me as urgent for an updated Xen release. In the past 3 months, both large manufacturers of desktop processors have released processors with sufficient clock speed to require this patch. This WILL trigger *massive* numbers of bug reports very soon. Similarly I suggest all Linux distributions which distribute Xen will want to issue updates urgently. -- (\___(\___(\______ --=> 8-) EHM <=-- ______/)___/)___/) \BS ( | ehem+sigmsg@m5p.com PGP 87145445 | ) / \_CS\ | _____ -O #include O- _____ | / _/ 8A19\___\_|_/58D2 7E3D DDF4 7BA6 <-PGP-> 41D1 B375 37D0 8714\_|_/___/5445