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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="FPfXQgFjcws9KP6z" Content-Disposition: inline In-Reply-To: <8f0a2f4352bf6241e66f2fea1776d0c82a3c566d.1671139149.git.demi@invisiblethingslab.com> --FPfXQgFjcws9KP6z Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 15 Dec 2022 21:25:07 -0500 From: Demi Marie Obenour To: xen-devel@lists.xenproject.org Cc: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper , Roger Pau =?utf-8?B?TW9ubsOp?= , Wei Liu , Jun Nakajima , Kevin Tian , George Dunlap , Tim Deegan Subject: Re: [PATCH v4 02/10] x86/mm: Avoid hard-coding PAT in get_page_from_l1e() On Thu, Dec 15, 2022 at 06:57:44PM -0500, Demi Marie Obenour wrote: > get_page_from_l1e() relied on Xen's choice of PAT, which is brittle in > the face of future PAT changes. Instead, compute the actual cacheability > used by the CPU and switch on that, as this will work no matter what PAT > Xen uses. >=20 > No functional change intended. >=20 > Signed-off-by: Demi Marie Obenour > --- > Changes since v3: > - Compute and use the actual cacheability as seen by the processor. >=20 > Changes since v2: > - Improve commit message. > --- > xen/arch/x86/include/asm/processor.h | 8 ++++++++ > xen/arch/x86/mm.c | 19 +++++++++++++------ > 2 files changed, 21 insertions(+), 6 deletions(-) >=20 > diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/= asm/processor.h > index 8e2816fae9b97bd4e153a30cc3802971fe0355af..c3205ed9e10c1a57d23c5ecea= d66bebd82d87d06 100644 > --- a/xen/arch/x86/include/asm/processor.h > +++ b/xen/arch/x86/include/asm/processor.h > @@ -100,6 +100,14 @@ > =20 > #ifndef __ASSEMBLY__ > =20 > +/* Convert from PAT/PCD/PWT embedded in PTE flags to actual cacheability= value */ > +static inline unsigned int pte_flags_to_cacheability(unsigned int flags) > +{ > + unsigned int pat_shift =3D ((flags & _PAGE_PAT) >> 2) | > + (flags & (_PAGE_PCD|_PAGE_PWT)); This could also be written as unsigned int pat_shift =3D pte_flags_to_cacheattr(flags) << 3; which might be easiser to read. > + return 0xFF & (XEN_MSR_PAT >> pat_shift); > +} > + > struct domain; > struct vcpu; > =20 > diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c > index 78b1972e4170cacccc9c37c6e64e76e66a7da87f..802073a01c5cf4dc3cf1d58d2= 8ea4d4e9e8149c7 100644 > --- a/xen/arch/x86/mm.c > +++ b/xen/arch/x86/mm.c > @@ -959,15 +959,22 @@ get_page_from_l1e( > flip =3D _PAGE_RW; > } > =20 > - switch ( l1f & PAGE_CACHE_ATTRS ) > + /* Force cacheable memtypes to UC */ > + switch ( pte_flags_to_cacheability(l1f) ) > { > - case 0: /* WB */ > - flip |=3D _PAGE_PWT | _PAGE_PCD; > + case X86_MT_UC: > + case X86_MT_UCM: > + case X86_MT_WC: > + /* not cached */ > break; > - case _PAGE_PWT: /* WT */ > - case _PAGE_PWT | _PAGE_PAT: /* WP */ > - flip |=3D _PAGE_PCD | (l1f & _PAGE_PAT); > + case X86_MT_WB: > + case X86_MT_WT: > + case X86_MT_WP: > + /* cacheable, force to UC */ > + flip |=3D (l1f & PAGE_CACHE_ATTRS) ^ _PAGE_UC; > break; > + default: > + BUG(); Question for future reference: is this an appropriate use of BUG()? The default case is clearly unreachable, and I actually considered using unreachable() here, but this isn=E2=80=99t performance-critical code from w= hat I can tell. If execution *does* reach here something is seriously wrong. --=20 Sincerely, Demi Marie Obenour (she/her/hers) Invisible Things Lab --FPfXQgFjcws9KP6z Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEdodNnxM2uiJZBxxxsoi1X/+cIsEFAmOb1wQACgkQsoi1X/+c IsHiKg/7BhWIj/lezXge/YjXtz/ov1OqeWYtIUZ/994cUUhJ7/nFKQFU0QjyIggE Ie6Gvy8ECrMoeq1TYQ561AXHK7PYwVjCa16Oq2QNXNsVl9zPDfu3/vk3nVF+zE8k NM7WVyHydFcaB10J726O4fGaLlMjMxQmbIm+w4KUIVwJYLEhHLnXiPTQ19Muz0Ag a8yRIKRy8c+3EjZp8AR24NVTi2j6wDb6oG9hbDYU5MY/gSHpCfstW1Z8qI+Wm6jy 3r6ZIR1ZyMQwPYZ8phUQOkqaFj5VIis9uG7M7E6en02B79dKs1tB1IlkRxvqH6yB 033ebYTh3K+GVjHAEGdtnPiDq7e6S46EHmwde3fVZgjZYzAOhVMisWSeyyF01V62 CGz4Gr7TgTZtqBcISkD01N7sGM0RgKmbsFyeY0NDLtfn/p+nOxQkwIiTEeeRNql2 mcZ5uen6FlAHymqXoPGzqAxP40vnRTdHYTZ6ShwWjRJGp8s6Txtb8VJRiMgOhG+u FIwHA/e4GnB0MAfS+GIfGa0eMBH90vDuNVe8AzcJTcsk2GcXBi8q+mZwXT4ARkVd uu7E1D8tbLEZ+mi+Yw78gaIG4N2QecX4fMbj1c3hGh3pTp2/1ScDuwQAb+WbH5kE et0nfZGWHtoKbYv1hmZe0kcHs58K9jgiLQEu+lSpNvyZURgEdN8= =LXTa -----END PGP SIGNATURE----- --FPfXQgFjcws9KP6z--