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From: William Breathitt Gray <william.gray@linaro.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v9 4/5] counter: Add Renesas RZ/G2L MTU3a counter driver
Date: Fri, 16 Dec 2022 12:13:51 -0500	[thread overview]
Message-ID: <Y5ynT6h/cZwXcMxz@fedora> (raw)
In-Reply-To: <OS0PR01MB5922FB904619669BE9DD85A086E69@OS0PR01MB5922.jpnprd01.prod.outlook.com>

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On Fri, Dec 16, 2022 at 05:00:30PM +0000, Biju Das wrote:
> > Hello Biju,
> > 
> > Do you need to take the ch->lock before checking ch->is_busy to ensure it
> > does not change?
> 
> priv->count_is_enabled[count->id]-> true means channel is held by counter.
> So pwm won't be able to change the state ch->is_busy.
> 
> priv->count_is_enabled[count->id]-> false and if there is contention for ch->busy
> whoever is first calling rz_mtu3_request_channel() will get the channel.
> among pwm_request and counter_enable.
> 
> So I think it is safe here. Please correct me if I am missing something.
> 
> static inline bool rz_mtu3_request_channel(struct rz_mtu3_channel *ch)
> {
> 	bool is_idle;
> 
> 	mutex_lock(&ch->lock);
> 	is_idle = !ch->is_busy;
> 	if (is_idle)
> 		ch->is_busy = true;
> 	mutex_unlock(&ch->lock);
> 
> 	return is_idle;
> }

Okay seems safe then. If the respective count_is_enabled will only be
true when the respective channel is held by the counter, is there a need
to check ch->is_busy, or would checking count_is_enabled alone suffice?

William Breathitt Gray

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  reply	other threads:[~2022-12-16 17:14 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-14 10:31 [PATCH v9 0/5] Add RZ/G2L MTU3a Core, Counter and pwm driver Biju Das
2022-12-14 10:31 ` [PATCH v9 1/5] dt-bindings: timer: Document RZ/G2L MTU3a bindings Biju Das
2022-12-14 10:31 ` [PATCH v9 2/5] clocksource/drivers: Add Renesas RZ/G2L MTU3a core driver Biju Das
2022-12-14 10:31 ` [PATCH v9 3/5] Documentation: ABI: sysfs-bus-counter: add cascade_counts_enable and external_input_phase_clock_select Biju Das
2022-12-16 15:38   ` William Breathitt Gray
2022-12-14 10:31 ` [PATCH v9 4/5] counter: Add Renesas RZ/G2L MTU3a counter driver Biju Das
2022-12-16 16:01   ` William Breathitt Gray
2022-12-16 17:00     ` Biju Das
2022-12-16 17:13       ` William Breathitt Gray [this message]
2022-12-16 17:24         ` Biju Das
2022-12-16 17:34           ` William Breathitt Gray
2022-12-14 10:31 ` [PATCH v9 5/5] pwm: Add Renesas RZ/G2L MTU3a PWM driver Biju Das

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