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From: Demi Marie Obenour <demi@invisiblethingslab.com>
To: Jan Beulich <jbeulich@suse.com>, xen-devel@lists.xenproject.org
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>
Subject: Re: [PATCH v5 11/10] hvmloader: use memory type constants
Date: Tue, 20 Dec 2022 12:45:14 -0500	[thread overview]
Message-ID: <Y6H0siXlkOwASOdk@itl-email> (raw)
In-Reply-To: <24461a6b-b118-aad9-6407-d215d07a2924@suse.com>

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On Tue, Dec 20, 2022 at 05:13:04PM +0100, Jan Beulich wrote:
> Now that we have them available in a header which is okay to use from
> hvmloader sources, do away with respective literal numbers and silent
> assumptions.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> --- a/tools/firmware/hvmloader/cacheattr.c
> +++ b/tools/firmware/hvmloader/cacheattr.c
> @@ -22,6 +22,8 @@
>  #include "util.h"
>  #include "config.h"
>  
> +#include <xen/asm/x86-defns.h>
> +
>  #define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg))
>  #define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1)
>  #define MSR_MTRRcap          0x00fe
> @@ -71,23 +73,32 @@ void cacheattr_init(void)
>  
>      addr_mask = ((1ull << phys_bits) - 1) & ~((1ull << 12) - 1);
>      mtrr_cap = rdmsr(MSR_MTRRcap);
> -    mtrr_def = (1u << 11) | 6; /* E, default type WB */
> +    mtrr_def = (1u << 11) | X86_MT_WB; /* E, default type WB */
>  
>      /* Fixed-range MTRRs supported? */
>      if ( mtrr_cap & (1u << 8) )
>      {
> +#define BCST2(mt) ((mt) | ((mt) << 8))
> +#define BCST4(mt) (BCST2(mt) | (BCST2(mt) << 16))

This should include a cast to uint32_t, just like BCST8 includes a cast
to uint64_t.  It doesn’t have any functional impact since none of the
memory types have the high bit set, but it makes the correctness of the
code much more obvious to readers.

> +#define BCST8(mt) (BCST4(mt) | ((uint64_t)BCST4(mt) << 32))
>          /* 0x00000-0x9ffff: Write Back (WB) */
> -        content = 0x0606060606060606ull;
> +        content = BCST8(X86_MT_WB);
>          wrmsr(MSR_MTRRfix64K_00000, content);
>          wrmsr(MSR_MTRRfix16K_80000, content);
> +
>          /* 0xa0000-0xbffff: Write Combining (WC) */
>          if ( mtrr_cap & (1u << 10) ) /* WC supported? */
> -            content = 0x0101010101010101ull;
> +            content = BCST8(X86_MT_WC);
>          wrmsr(MSR_MTRRfix16K_A0000, content);
> +
>          /* 0xc0000-0xfffff: Write Back (WB) */
> -        content = 0x0606060606060606ull;
> +        content = BCST8(X86_MT_WB);
>          for ( i = 0; i < 8; i++ )
>              wrmsr(MSR_MTRRfix4K_C0000 + i, content);
> +#undef BCST8
> +#undef BCST4
> +#undef BCST2
> +
>          mtrr_def |= 1u << 10; /* FE */
>          printf("fixed MTRRs ... ");
>      }
> @@ -106,7 +117,7 @@ void cacheattr_init(void)
>              while ( ((base + size) < base) || ((base + size) > pci_mem_end) )
>                  size >>= 1;
>  
> -            wrmsr(MSR_MTRRphysBase(i), base);
> +            wrmsr(MSR_MTRRphysBase(i), base | X86_MT_UC);
>              wrmsr(MSR_MTRRphysMask(i), (~(size - 1) & addr_mask) | (1u << 11));
>  
>              base += size;
> @@ -121,7 +132,7 @@ void cacheattr_init(void)
>              while ( (base + size < base) || (base + size > pci_hi_mem_end) )
>                  size >>= 1;
>  
> -            wrmsr(MSR_MTRRphysBase(i), base);
> +            wrmsr(MSR_MTRRphysBase(i), base | X86_MT_UC);
>              wrmsr(MSR_MTRRphysMask(i), (~(size - 1) & addr_mask) | (1u << 11));
>  
>              base += size;
> 

With the suggested change:

Acked-by: Demi Marie Obenour <demi@invisiblethingslab.com>
-- 
Sincerely,
Demi Marie Obenour (she/her/hers)
Invisible Things Lab

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  parent reply	other threads:[~2022-12-20 17:45 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-20  1:07 [PATCH v5 00/10] Make PAT handling less brittle Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 01/10] x86: Add memory type constants Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 02/10] x86/mm: Avoid hard-coding PAT in get_page_from_l1e() Demi Marie Obenour
2022-12-20  8:19   ` Jan Beulich
2022-12-22  9:51     ` Jan Beulich
2022-12-22  9:58       ` Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 03/10] x86: Replace PAT_* with X86_MT_* Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 04/10] x86: Replace MTRR_* constants with X86_MT_* constants Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 05/10] x86: Replace EPT_EMT_* constants with X86_MT_* Demi Marie Obenour
2022-12-20  8:21   ` Jan Beulich
2022-12-20  1:07 ` [PATCH v5 06/10] x86: Remove MEMORY_NUM_TYPES and NO_HARDCODE_MEM_TYPE Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 07/10] x86: Derive XEN_MSR_PAT from its individual entries Demi Marie Obenour
2022-12-20  1:07 ` [PATCH v5 08/10] x86/mm: make code robust to future PAT changes Demi Marie Obenour
2022-12-22  9:35   ` Jan Beulich
2022-12-22  9:50     ` Demi Marie Obenour
2022-12-22  9:54       ` Jan Beulich
2022-12-22 10:00         ` Demi Marie Obenour
2022-12-22 10:03           ` Jan Beulich
2022-12-20  1:07 ` [PATCH v5 09/10] x86/mm: Reject invalid cacheability in PV guests by default Demi Marie Obenour
2022-12-22  9:48   ` Jan Beulich
2022-12-22  9:55     ` Demi Marie Obenour
2022-12-22 10:06       ` Jan Beulich
2022-12-20  1:07 ` [PATCH v5 10/10] x86: Use Linux's PAT Demi Marie Obenour
2022-12-20 16:13 ` [PATCH v5 11/10] hvmloader: use memory type constants Jan Beulich
2022-12-20 16:36   ` Andrew Cooper
2022-12-20 16:50     ` Jan Beulich
2022-12-20 17:45   ` Demi Marie Obenour [this message]
2022-12-21  6:56     ` Jan Beulich

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