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[2404:9400:2221:ea00::3]) by mx.google.com with ESMTPS id j11-20020a636e0b000000b00477bbd92cfdsi15677465pgc.592.2022.12.20.17.35.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Dec 2022 17:35:55 -0800 (PST) Received-SPF: pass (google.com: domain of dgibson@gandalf.ozlabs.org designates 2404:9400:2221:ea00::3 as permitted sender) client-ip=2404:9400:2221:ea00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@gibson.dropbear.id.au header.s=201602 header.b=OQ0GOFne; spf=pass (google.com: domain of dgibson@gandalf.ozlabs.org designates 2404:9400:2221:ea00::3 as permitted sender) smtp.mailfrom=dgibson@gandalf.ozlabs.org Received: by gandalf.ozlabs.org (Postfix, from userid 1007) id 4NcGHC3Qhwz4xND; Wed, 21 Dec 2022 12:35:51 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gibson.dropbear.id.au; s=201602; t=1671586551; bh=hc/MkNbRs6HXfOsHgP/4CBoGgqRbaZEm2xDfRWEe8vY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=OQ0GOFne/xbNyB6x1iZteJCfD1GFLXawsqQiFYP2XBPszL8AqlZ9DAjxCmOk6VCtH 6w0wyPawi4n7AUMwR3ZcvJRxvJfkGhatGG+bRPZgED54B8cckyCbHtcp4do6vk3fh9 AgLzKpMXB6mfq5GPi13m9VEJPwhqy/QlNQdhAd7A= Date: Wed, 21 Dec 2022 12:16:12 +1100 From: David Gibson To: Peter Maydell Cc: Daniel Henrique Barboza , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , qemu-devel@nongnu.org, BALATON Zoltan , Alex =?iso-8859-1?Q?Benn=E9e?= , Alistair Francis , Jason Wang , =?iso-8859-1?Q?C=E9dric?= Le Goater , Greg Kurz , qemu-arm@nongnu.org, "Edgar E. Iglesias" , qemu-ppc@nongnu.org Subject: Re: [RFC PATCH-for-8.0 2/3] hw/ppc/spapr: Replace tswap64(HPTE) by cpu_to_be64(HPTE) Message-ID: References: <20221213125218.39868-1-philmd@linaro.org> <20221213125218.39868-3-philmd@linaro.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6LrPJVJFL2btEcHt" Content-Disposition: inline In-Reply-To: X-TUID: 74F4vsquLEdE --6LrPJVJFL2btEcHt Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Dec 19, 2022 at 10:39:40AM +0000, Peter Maydell wrote: > On Mon, 19 Dec 2022 at 06:35, David Gibson = wrote: > > > > On Fri, Dec 16, 2022 at 09:39:19PM +0000, Peter Maydell wrote: > > > On Fri, 16 Dec 2022 at 19:11, Daniel Henrique Barboza > > > wrote: > > > > > > > > > > > > > > > > On 12/13/22 10:51, Peter Maydell wrote: > > > > Yes, most if not all accesses are being handled as "target endian",= even > > > > though the target is always big endian. > > > > So "target is always big endian" is pretty misleading for POWER. We > > always define "TARGET_BIG_ENDIAN" in qemu, but for at least 10 years > > the CPUs have been capable of running in either big endian or little > > endian mode (selected at runtime). Some variants can choose > > endianness on a per-page basis. Since the creation of the ISA it's > > had "byte reversed" load and store instructions that let it use little > > endian for specific memory accesses. >=20 > Yeah, this is like Arm (and for the purposes of this thread > I meant essentially "TARGET_BIG_ENDIAN is always defined"). Ok. > > Really the whole notion of an ISA having an "endianness" doesn't make > > a lot of sense - it's an individual load or store to memory that has > > an endianness which can depend on a bunch of factors. When these > > macros were created, an ISA nearly always used the same endianness, > > but that's not really true any more - not just for POWER, but for a > > bunch of targets. So from that point of view, I think getting rid of > > tswap() - particularly one that has compile time semantics, rather > > than behaviour which can depend on cpu mode/state is a good idea. >=20 > I tend to think of the TARGET_BIG_ENDIAN/not setting as being > something like "CPU bus endianness". At least for Arm, when you > put the CPU into BE mode it pretty much means "the CPU byteswaps > the data when it comes in/out", AIUI. Hmm, I guess. We're not really modelling down to the level of bus byte lanes, though, so I'm not really convinced that's a meaningful definition in the context of qemu. > > I believe that even when running in little-endian mode, the hash page > > tables are encoded in big-endian, so I think the proposed change makes > > sense. >=20 > OK. I still think we should consistently change all the places that are > accessing this data structure, though, not just half of them. Yes, that makes sense. Although what exactly constitutes "this data structure" is a bit complex here. If we mean just the spapr specific "external HPT", then there are only a few more references to it. If we mean all instances of a powerpc hashed page table, then there are a bunch more in the cpu target code. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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