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Oh yeap! and that case is funny! Because the indication from PCODE is that 10 seconds is enough, but there are some rare cases where it gets stuck and end up taking a very long time. Then they multiplied the bad rare case to 3, and no idea why how that become 6. But anyway, thanks for refreshing my memory. When I first noticed this patch I thought it was in all the platforms, where this wouldn't make sense. But on discrete where the pcode needs to bring the memory and gt up before we can really use it, it makes sense. And then I noticed that your patch is indeed for dgfx only, so it would be okay. And 10 seconds is okay. However I also noticed that you do this before the other pcode_init check that we were told by pcode folks to use. So, I don't understand how your patch is helping now... you wait for 10 seconds and then you will wait more 10 seconds on the pcode_ready... why the pcode_ready check that we have in case already doesn't cover yours? And why that return? > > Thanks for checking this, > Andi > > > > > > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7814 > > > > > > Signed-off-by: Aravind Iddamsetty > > > Co-developed-by: Chris Wilson > > > Cc: Rodrigo Vivi > > > Signed-off-by: Andi Shyti > > > --- > > > drivers/gpu/drm/i915/intel_pcode.c | 35 ++++++++++++++++++++++++++---- > > > 1 file changed, 31 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c > > > index a234d9b4ed14..3db2ba439bb5 100644 > > > --- a/drivers/gpu/drm/i915/intel_pcode.c > > > +++ b/drivers/gpu/drm/i915/intel_pcode.c > > > @@ -204,15 +204,42 @@ int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, > > > #undef COND > > > } > > > > > > +static int pcode_init_wait(struct intel_uncore *uncore, int timeout_ms) > > > +{ > > > + if (__intel_wait_for_register_fw(uncore, > > > + GEN6_PCODE_MAILBOX, > > > + GEN6_PCODE_READY, 0, > > > + 500, timeout_ms, > > > + NULL)) > > > + return -EPROBE_DEFER; > > > + > > > + return skl_pcode_request(uncore, > > > + DG1_PCODE_STATUS, > > > + DG1_UNCORE_GET_INIT_STATUS, > > > + DG1_UNCORE_INIT_STATUS_COMPLETE, > > > + DG1_UNCORE_INIT_STATUS_COMPLETE, timeout_ms); > > > +} > > > + > > > int intel_pcode_init(struct intel_uncore *uncore) > > > { > > > + int err; > > > + > > > if (!IS_DGFX(uncore->i915)) > > > return 0; > > > > > > - return skl_pcode_request(uncore, DG1_PCODE_STATUS, > > > - DG1_UNCORE_GET_INIT_STATUS, > > > - DG1_UNCORE_INIT_STATUS_COMPLETE, > > > - DG1_UNCORE_INIT_STATUS_COMPLETE, 180000); > > > + /* > > > + * Wait 10 seconds so that the punit to settle and complete > > > + * any outstanding transactions upon module load > > > + */ > > > + err = pcode_init_wait(uncore, 10000); > > > + > > > + if (err) { > > > + drm_notice(&uncore->i915->drm, > > > + "Waiting for HW initialisation...\n"); > > > + err = pcode_init_wait(uncore, 180000); > > > + } > > > + > > > + return err; > > > } > > > > > > int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val) > > > -- > > > 2.34.1 > > >