diff for duplicates of <Y8QGtlnZKk5rp+fg@xhacker> diff --git a/a/1.txt b/N1/1.txt index 3af673e..40577e8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote: -> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St?bner wrote: +> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko Stübner wrote: > > Hi Jisheng. > > > > Am Mittwoch, 11. Januar 2023, 18:10:19 CET schrieb Jisheng Zhang: @@ -27,7 +27,7 @@ On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote: > yesterday here [*]. It seems we need the concept of cpufeatures, which > may be extensions or non-extensions. > -> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx at xhacker/ +> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx@xhacker/ > > > > > See Palmer's series [0]. @@ -49,7 +49,7 @@ suggested bitmap for cpufeatures which cover both ISA extensions and non-extensions-but-some-cpu-related-features [1], but it was rejected at that time, it seems we need to revisit the idea. -[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang at kernel.org/ +[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang@kernel.org/ > > Thanks, @@ -77,4 +77,9 @@ but it was rejected at that time, it seems we need to revisit the idea. > > [1] https://github.com/mmind/linux-riscv/commit/f57a896122ee7e666692079320fc35829434cf96 > > [2] https://github.com/mmind/linux-riscv/commit/8cef615dab0c00ad68af2651ee5b93d06be17f27#diff-194cb8a86f9fb9b03683295f21c8f46b456a9f94737f01726ddbcbb9e3aace2cR12 > > -> > +> > + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index 00eb870..1ae6672 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,13 +3,23 @@ "ref\02398293.3Lj2Plt8kZ@diego\0" "ref\020230112092136.f2g43hrhmrqouy4y@orel\0" "From\0Jisheng Zhang <jszhang@kernel.org>\0" - "Subject\0[PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions\0" + "Subject\0Re: [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions\0" "Date\0Sun, 15 Jan 2023 21:59:18 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Andrew Jones <ajones@ventanamicro.com>\0" + "Cc\0Heiko St\303\274bner <heiko@sntech.de>" + Paul Walmsley <paul.walmsley@sifive.com> + Palmer Dabbelt <palmer@dabbelt.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote:\n" - "> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St?bner wrote:\n" + "> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St\303\274bner wrote:\n" "> > Hi Jisheng.\n" "> > \n" "> > Am Mittwoch, 11. Januar 2023, 18:10:19 CET schrieb Jisheng Zhang:\n" @@ -37,7 +47,7 @@ "> yesterday here [*]. It seems we need the concept of cpufeatures, which\n" "> may be extensions or non-extensions.\n" "> \n" - "> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx at xhacker/\n" + "> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx@xhacker/\n" "> \n" "> > \n" "> > See Palmer's series [0].\n" @@ -59,7 +69,7 @@ "and non-extensions-but-some-cpu-related-features [1],\n" "but it was rejected at that time, it seems we need to revisit the idea.\n" "\n" - "[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang at kernel.org/\n" + "[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang@kernel.org/\n" "\n" "> \n" "> Thanks,\n" @@ -87,6 +97,11 @@ "> > [1] https://github.com/mmind/linux-riscv/commit/f57a896122ee7e666692079320fc35829434cf96\n" "> > [2] https://github.com/mmind/linux-riscv/commit/8cef615dab0c00ad68af2651ee5b93d06be17f27#diff-194cb8a86f9fb9b03683295f21c8f46b456a9f94737f01726ddbcbb9e3aace2cR12\n" "> > \n" - > > + "> > \n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -8ed0b8220cbaf1e43827c6d32118e3577bf068f28cf2656570ef9cf7b3790667 +57c4f9a0881e52d173c4068511b81a2f288ecd69da3bc533aebba6ff193ad94a
diff --git a/a/1.txt b/N2/1.txt index 3af673e..cbf5bae 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,5 +1,5 @@ On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote: -> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St?bner wrote: +> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko Stübner wrote: > > Hi Jisheng. > > > > Am Mittwoch, 11. Januar 2023, 18:10:19 CET schrieb Jisheng Zhang: @@ -27,7 +27,7 @@ On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote: > yesterday here [*]. It seems we need the concept of cpufeatures, which > may be extensions or non-extensions. > -> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx at xhacker/ +> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx@xhacker/ > > > > > See Palmer's series [0]. @@ -49,7 +49,7 @@ suggested bitmap for cpufeatures which cover both ISA extensions and non-extensions-but-some-cpu-related-features [1], but it was rejected at that time, it seems we need to revisit the idea. -[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang at kernel.org/ +[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang@kernel.org/ > > Thanks, diff --git a/a/content_digest b/N2/content_digest index 00eb870..87b76d2 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,13 +3,23 @@ "ref\02398293.3Lj2Plt8kZ@diego\0" "ref\020230112092136.f2g43hrhmrqouy4y@orel\0" "From\0Jisheng Zhang <jszhang@kernel.org>\0" - "Subject\0[PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions\0" + "Subject\0Re: [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions\0" "Date\0Sun, 15 Jan 2023 21:59:18 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Andrew Jones <ajones@ventanamicro.com>\0" + "Cc\0Heiko St\303\274bner <heiko@sntech.de>" + Paul Walmsley <paul.walmsley@sifive.com> + Palmer Dabbelt <palmer@dabbelt.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "On Thu, Jan 12, 2023 at 10:21:36AM +0100, Andrew Jones wrote:\n" - "> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St?bner wrote:\n" + "> On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko St\303\274bner wrote:\n" "> > Hi Jisheng.\n" "> > \n" "> > Am Mittwoch, 11. Januar 2023, 18:10:19 CET schrieb Jisheng Zhang:\n" @@ -37,7 +47,7 @@ "> yesterday here [*]. It seems we need the concept of cpufeatures, which\n" "> may be extensions or non-extensions.\n" "> \n" - "> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx at xhacker/\n" + "> [*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx@xhacker/\n" "> \n" "> > \n" "> > See Palmer's series [0].\n" @@ -59,7 +69,7 @@ "and non-extensions-but-some-cpu-related-features [1],\n" "but it was rejected at that time, it seems we need to revisit the idea.\n" "\n" - "[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang at kernel.org/\n" + "[1] https://lore.kernel.org/linux-riscv/20220508160749.984-1-jszhang@kernel.org/\n" "\n" "> \n" "> Thanks,\n" @@ -89,4 +99,4 @@ "> > \n" > > -8ed0b8220cbaf1e43827c6d32118e3577bf068f28cf2656570ef9cf7b3790667 +5084fbccacf4e825eec9fe11b31d21518c1a445de7b8b551a20b79cf48cb6670
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