From: Catalin Marinas <catalin.marinas@arm.com>
To: Gabriel Krisman Bertazi <krisman@suse.de>
Cc: will@kernel.org, linux-arm-kernel@lists.infradead.org,
broonie@kernel.org
Subject: Re: [PATCH v2] arm64: Avoid repeated AA64MMFR1_EL1 register read on pagefault path
Date: Wed, 18 Jan 2023 15:44:07 +0000 [thread overview]
Message-ID: <Y8gTx/YKsgdpohMA@arm.com> (raw)
In-Reply-To: <20230109151955.8292-1-krisman@suse.de>
On Mon, Jan 09, 2023 at 12:19:55PM -0300, Gabriel Krisman Bertazi wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 03d1c9d7af82..3d1a5677321e 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -864,7 +864,11 @@ static inline bool cpu_has_hw_af(void)
> if (!IS_ENABLED(CONFIG_ARM64_HW_AFDBM))
> return false;
>
> - mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
> + /*
> + * Use cached version to avoid emulated msr operation on KVM
> + * guests.
> + */
> + mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);
> return cpuid_feature_extract_unsigned_field(mmfr1,
> ID_AA64MMFR1_EL1_HAFDBS_SHIFT);
> }
You can probably make it slightly faster if you add a cpucap feature. We
have ARM64_HW_DBM but not ARM64_HW_AF. Not sure you'd notice a
difference in practice though.
--
Catalin
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next prev parent reply other threads:[~2023-01-18 15:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-09 15:19 [PATCH v2] arm64: Avoid repeated AA64MMFR1_EL1 register read on pagefault path Gabriel Krisman Bertazi
2023-01-11 8:34 ` Anshuman Khandual
2023-01-11 13:31 ` Gabriel Krisman Bertazi
2023-01-12 2:57 ` Anshuman Khandual
2023-01-12 3:05 ` Anshuman Khandual
2023-01-16 20:41 ` Gabriel Krisman Bertazi
2023-01-17 16:14 ` Will Deacon
2023-01-18 16:08 ` Gabriel Krisman Bertazi
2023-01-18 15:44 ` Catalin Marinas [this message]
2023-01-18 16:06 ` Gabriel Krisman Bertazi
2023-01-18 16:38 ` Will Deacon
2023-01-20 16:59 ` Catalin Marinas
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