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Date:   Thu, 26 Jan 2023 08:45:45 +0100
From:   Greg KH <gregkh@linuxfoundation.org>
To:     "Guilherme G. Piccoli" <gpiccoli@igalia.com>
Cc:     stable@vger.kernel.org, sashal@kernel.org, x86@kernel.org,
        kernel@gpiccoli.net, kernel-dev@igalia.com,
        Deepak Sharma <deepak.sharma@amd.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH 5.10 / 5.15] x86: ACPI: cstate: Optimize C3 entry on AMD
 CPUs
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References: <20230125215145.1171151-1-gpiccoli@igalia.com>
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On Wed, Jan 25, 2023 at 06:51:45PM -0300, Guilherme G. Piccoli wrote:
> From: Deepak Sharma <deepak.sharma@amd.com>
> 
> commit a8fb40966f19ff81520d9ccf8f7e2b95201368b8 upstream.
> 
> All Zen or newer CPU which support C3 shares cache. Its not necessary to
> flush the caches in software before entering C3. This will cause drop in
> performance for the cores which share some caches. ARB_DIS is not used
> with current AMD C state implementation. So set related flags correctly.
> 
> Signed-off-by: Deepak Sharma <deepak.sharma@amd.com>
> Acked-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com>
> ---
> 
> 
> Hi folks, this is a very simple optimization that might be read
> as a fix IMO, since it's setting the flags correctly for the Zen CPUs.
> It was built/boot tested in the Steam Deck.
> 
> The backport for stable was a suggestion from Greg [0], so lemme
> know if any of you see an issue with that, or if we should target
> other stable versions (or less versions, maybe only 5.15).
> Cheers,

Looks good, thanks for the backport, now queued up!

greg k-h