diff for duplicates of <Y9L0SXMpWWi9L1Ty@spud>

diff --git a/N1/1.1.hdr b/N1/1.1.hdr
new file mode 100644
index 0000000..5a32186
--- /dev/null
+++ b/N1/1.1.hdr
@@ -0,0 +1,3 @@
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diff --git a/a/1.txt b/N1/1.1.txt
similarity index 83%
rename from a/1.txt
rename to N1/1.1.txt
index 1c335ac..e277278 100644
--- a/a/1.txt
+++ b/N1/1.1.txt
@@ -4,14 +4,14 @@ On Wed, Jan 25, 2023 at 02:20:46PM +0000, Andy Chiu wrote:
 > This patch adds task switch support for vector. It also supports all
 > lengths of vlen.
 > 
-> [guoren at linux.alibaba.com: First available porting to support vector
+> [guoren@linux.alibaba.com: First available porting to support vector
 > context switching]
-> [nick.knight at sifive.com: Rewrite vector.S to support dynamic vlen, xlen and
+> [nick.knight@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and
 > code refine]
-> [vincent.chen at sifive.com: Fix the might_sleep issue in vstate_save,
+> [vincent.chen@sifive.com: Fix the might_sleep issue in vstate_save,
 > vstate_restore]
-> [andrew at sifive.com: Optimize task switch codes of vector]
-> [ruinland.tsai at sifive.com: Fix the arch_release_task_struct free wrong
+> [andrew@sifive.com: Optimize task switch codes of vector]
+> [ruinland.tsai@sifive.com: Fix the arch_release_task_struct free wrong
 > datap issue]
 > [vineetg: Fixed lkp warning with W=1 build]
 > [andy.chiu: Use inline asm for task switches]
@@ -33,7 +33,7 @@ More comments about what people did than patch description, lol!
 
 Anyways, this patch breaks the build for every config we have, so please
 fix that when you are re-submitting:
-https://patchwork.kernel.org/project/linux-riscv/patch/20230125142056.18356-10-andy.chiu at sifive.com/
+https://patchwork.kernel.org/project/linux-riscv/patch/20230125142056.18356-10-andy.chiu@sifive.com/
 
 Any of allmodconfig, rv32_defconfig, nommu_{k210,virt}_defconfig should
 reproduce with gcc 12.2 - but I have no idea if it's the same same
@@ -99,11 +99,3 @@ Conor.
 > +	do_trap_error(regs, SIGILL, ILL_ILLOPC, regs->epc,
 > +		      "Oops - illegal instruction");
 > +}
-
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diff --git a/N1/1.2.bin b/N1/1.2.bin
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diff --git a/N1/2.hdr b/N1/2.hdr
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diff --git a/N1/2.txt b/N1/2.txt
new file mode 100644
index 0000000..e409076
--- /dev/null
+++ b/N1/2.txt
@@ -0,0 +1,4 @@
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index df4bf77..9475046 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,32 @@
  "ref\020230125142056.18356-1-andy.chiu@sifive.com\0"
  "ref\020230125142056.18356-10-andy.chiu@sifive.com\0"
  "From\0Conor Dooley <conor@kernel.org>\0"
- "Subject\0[PATCH -next v13 09/19] riscv: Add task switch support for vector\0"
+ "Subject\0Re: [PATCH -next v13 09/19] riscv: Add task switch support for vector\0"
  "Date\0Thu, 26 Jan 2023 21:44:41 +0000\0"
- "To\0kvm-riscv@lists.infradead.org\0"
- "\00:1\0"
+ "To\0Andy Chiu <andy.chiu@sifive.com>\0"
+ "Cc\0Kefeng Wang <wangkefeng.wang@huawei.com>"
+  guoren@linux.alibaba.com
+  Heiko Stuebner <heiko@sntech.de>
+  kvm@vger.kernel.org
+  atishp@atishpatra.org
+  Conor Dooley <conor.dooley@microchip.com>
+  Guo Ren <guoren@kernel.org>
+  Jisheng Zhang <jszhang@kernel.org>
+  linux-riscv@lists.infradead.org
+  Nick Knight <nick.knight@sifive.com>
+  Xianting Tian <xianting.tian@linux.alibaba.com>
+  anup@brainfault.org
+  Ruinland Tsai <ruinland.tsai@sifive.com>
+  greentime.hu@sifive.com
+  Albert Ou <aou@eecs.berkeley.edu>
+  vineetg@rivosinc.com
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Dmitry Vyukov <dvyukov@google.com>
+  Vincent Chen <vincent.chen@sifive.com>
+  palmer@dabbelt.com
+  Eric W. Biederman <ebiederm@xmission.com>
+ " kvm-riscv@lists.infradead.org\0"
+ "\02:1.1\0"
  "b\0"
  "On Wed, Jan 25, 2023 at 02:20:46PM +0000, Andy Chiu wrote:\n"
  "> From: Greentime Hu <greentime.hu@sifive.com>\n"
@@ -12,14 +34,14 @@
  "> This patch adds task switch support for vector. It also supports all\n"
  "> lengths of vlen.\n"
  "> \n"
- "> [guoren at linux.alibaba.com: First available porting to support vector\n"
+ "> [guoren@linux.alibaba.com: First available porting to support vector\n"
  "> context switching]\n"
- "> [nick.knight at sifive.com: Rewrite vector.S to support dynamic vlen, xlen and\n"
+ "> [nick.knight@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and\n"
  "> code refine]\n"
- "> [vincent.chen at sifive.com: Fix the might_sleep issue in vstate_save,\n"
+ "> [vincent.chen@sifive.com: Fix the might_sleep issue in vstate_save,\n"
  "> vstate_restore]\n"
- "> [andrew at sifive.com: Optimize task switch codes of vector]\n"
- "> [ruinland.tsai at sifive.com: Fix the arch_release_task_struct free wrong\n"
+ "> [andrew@sifive.com: Optimize task switch codes of vector]\n"
+ "> [ruinland.tsai@sifive.com: Fix the arch_release_task_struct free wrong\n"
  "> datap issue]\n"
  "> [vineetg: Fixed lkp warning with W=1 build]\n"
  "> [andy.chiu: Use inline asm for task switches]\n"
@@ -41,7 +63,7 @@
  "\n"
  "Anyways, this patch breaks the build for every config we have, so please\n"
  "fix that when you are re-submitting:\n"
- "https://patchwork.kernel.org/project/linux-riscv/patch/20230125142056.18356-10-andy.chiu at sifive.com/\n"
+ "https://patchwork.kernel.org/project/linux-riscv/patch/20230125142056.18356-10-andy.chiu@sifive.com/\n"
  "\n"
  "Any of allmodconfig, rv32_defconfig, nommu_{k210,virt}_defconfig should\n"
  "reproduce with gcc 12.2 - but I have no idea if it's the same same\n"
@@ -106,14 +128,22 @@
  "> +\t}\n"
  "> +\tdo_trap_error(regs, SIGILL, ILL_ILLOPC, regs->epc,\n"
  "> +\t\t      \"Oops - illegal instruction\");\n"
- "> +}\n"
+ > +}
+ "\02:1.2\0"
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+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
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