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19 Jan 2021 10:59:42 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 19 Jan 2021 20:59:41 +0200 Date: Tue, 19 Jan 2021 20:59:41 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Manasi Navare Message-ID: References: <20210113220935.4151-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210113220935.4151-1-manasi.d.navare@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH v4 00/18] VRR/Adaptive Sync Enabling on DP/eDP for TGL+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Jan 13, 2021 at 02:09:17PM -0800, Manasi Navare wrote: > This series address review comments from Ville > and incorporates some suggested fixes plus his > patches. > = > Aditya Swarup (1): > drm/i915/display/dp: Attach and set drm connector VRR property > = > Manasi Navare (8): > drm/i915/display/vrr: Create VRR file and add VRR capability check > drm/i915/display/dp: Compute VRR state in atomic_check > drm/i915/display/dp: Do not enable PSR if VRR is enabled > drm/i915/display/vrr: Configure and enable VRR in modeset enable > drm/i915/display/vrr: Send VRR push to flip the frame > drm/i915/display/vrr: Disable VRR in modeset disable path > drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink > drm/i915/display: Add HW state readout for VRR All of the above is Reviewed-by: Ville Syrj=E4l=E4 > = > Ville Syrj=E4l=E4 (9): > drm/i915: Store framestart_delay in dev_priv > drm/i915: Extract intel_mode_vblank_start() > drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp() > drm/i915/display: VRR + DRRS cannot be enabled together > drm/i915: Rename VRR_CTL reg fields > drm/i915/display: Helpers for VRR vblank min and max start > drm/i915: Add vrr state dump > drm/i915: Fix vblank timestamps with VRR > drm/i915: Fix vblank evasion with vrr > = > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/display/intel_ddi.c | 24 ++ > drivers/gpu/drm/i915/display/intel_display.c | 58 +++-- > .../drm/i915/display/intel_display_types.h | 11 + > drivers/gpu/drm/i915/display/intel_dp.c | 12 + > .../drm/i915/display/intel_dp_link_training.c | 2 +- > drivers/gpu/drm/i915/display/intel_psr.c | 7 + > drivers/gpu/drm/i915/display/intel_sprite.c | 21 +- > drivers/gpu/drm/i915/display/intel_vrr.c | 209 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_vrr.h | 33 +++ > drivers/gpu/drm/i915/i915_drv.h | 4 + > drivers/gpu/drm/i915/i915_irq.c | 53 +++-- > drivers/gpu/drm/i915/i915_reg.h | 14 +- > 13 files changed, 408 insertions(+), 41 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_vrr.c > create mode 100644 drivers/gpu/drm/i915/display/intel_vrr.h > = > -- = > 2.19.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx