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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock()
Date: Mon, 1 Feb 2021 21:16:17 +0200	[thread overview]
Message-ID: <YBhTgYvNX3sp7KwU@intel.com> (raw)
In-Reply-To: <20210201190720.mhsuf7qyq3oemqbp@ldmartin-desk1>

On Mon, Feb 01, 2021 at 11:07:20AM -0800, Lucas De Marchi wrote:
> On Mon, Feb 01, 2021 at 08:33:32PM +0200, Ville Syrjälä wrote:
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >Yank out the HSW/BDW code from intel_ddi_clk_{select,disable}()
> >and put it into the new encoder .{enable,disable}_clock() vfuncs.
> >
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 32 +++++++++++++++++++-----
> > 1 file changed, 26 insertions(+), 6 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> >index da8bb9a2de0b..b46d7be1996b 100644
> >--- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >@@ -3433,9 +3433,6 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
> >
> > 		intel_de_write(dev_priv, DPLL_CTRL2, val);
> >
> >-	} else if (INTEL_GEN(dev_priv) < 9) {
> >-		intel_de_write(dev_priv, PORT_CLK_SEL(port),
> >-			       hsw_pll_to_ddi_pll_sel(pll));
> > 	}
> >
> > 	mutex_unlock(&dev_priv->dpll.lock);
> >@@ -3458,12 +3455,30 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
> > 	} else if (IS_GEN9_BC(dev_priv)) {
> > 		intel_de_write(dev_priv, DPLL_CTRL2,
> > 			       intel_de_read(dev_priv, DPLL_CTRL2) | DPLL_CTRL2_DDI_CLK_OFF(port));
> >-	} else if (INTEL_GEN(dev_priv) < 9) {
> >-		intel_de_write(dev_priv, PORT_CLK_SEL(port),
> >-			       PORT_CLK_SEL_NONE);
> > 	}
> > }
> >
> >+static void hsw_ddi_enable_clock(struct intel_encoder *encoder,
> >+				 const struct intel_crtc_state *crtc_state)
> >+{
> >+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> 
> since we are adding this new function, better to use i915 rather than
> dev_priv.

Hmm. Yeah, looks like we can do that in this case since
PORT_CLK_SEL() doesn't depend on 'dev_priv'. I'm just too lazy
to always check for that, and so I tend to do the rename only
when there are no register accesses in the function.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-02-01 19:16 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-01 18:33 [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 01/15] drm/i915: Extract icl_dpclka_cfgcr0_reg() Ville Syrjala
2021-02-01 18:55   ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 02/15] drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*() Ville Syrjala
2021-02-01 18:59   ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 03/15] drm/i915: Introduce .{enable, disable}_clock() encoder vfuncs Ville Syrjala
2021-02-01 19:04   ` Lucas De Marchi
2021-02-01 19:09     ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:07   ` Lucas De Marchi
2021-02-01 19:16     ` Ville Syrjälä [this message]
2021-02-01 18:33 ` [Intel-gfx] [PATCH 05/15] drm/i915: Extract skl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 06/15] drm/i195: Extract cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 07/15] drm/i915: Convert DG1 over to .{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 08/15] drm/i915: Extract icl+ .{enable, disable}_clock() vfuncs Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 09/15] drm/i915: Use intel_de_rmw() for DDI clock routing Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 10/15] drm/i915: Sprinkle a few missing locks around shared DDI clock registers Ville Syrjala
2021-02-01 19:15   ` Lucas De Marchi
2021-02-01 19:21     ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 11/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() Ville Syrjala
2021-02-01 19:15   ` Lucas De Marchi
2021-02-01 18:33 ` [Intel-gfx] [PATCH 12/15] drm/i915: Extract _cnl_ddi_{enable, disable}_clock() Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 13/15] drm/i915: Split alds/rkl from icl_ddi_combo_{enable, disable}_clock() Ville Syrjala
2021-02-01 19:22   ` Lucas De Marchi
2021-02-01 19:31     ` Ville Syrjälä
2021-02-01 19:38       ` Ville Syrjälä
2021-02-01 18:33 ` [Intel-gfx] [PATCH 14/15] drm/i915: Use .disable_clock() for pll sanitation Ville Syrjala
2021-02-01 18:33 ` [Intel-gfx] [PATCH 15/15] drm/i915: Relocate icl_sanitize_encoder_pll_mapping() Ville Syrjala
2021-02-01 19:28 ` [Intel-gfx] [PATCH 00/15] drm/i915: Clean up the DDI clock routing mess Lucas De Marchi
2021-02-01 19:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-02-01 19:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-01 20:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-01 20:34   ` Ville Syrjälä
2021-02-01 21:08     ` Vudum, Lakshminarayana
2021-02-02  6:05     ` Nautiyal, Ankit K
2021-02-01 21:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-02  2:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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