From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08387C4708F for ; Tue, 1 Jun 2021 22:13:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6AD8613BC for ; Tue, 1 Jun 2021 22:13:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6AD8613BC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lunn.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ttZWQnjkw4WGttoOFjKEfuP2YCyd0B8BgnOCmlBFcpM=; b=Wvzyx/pirmJB4x LT9X1G/C9SwKwrTgC3iSQeELqlsoknCq6Bd9CGuEp5bLEbMbAia3rCeyQz34JXrQJwANTLN4cQcKM Cd+43p3oS3TPaND8a1tCKgmW2jRXTBICmSI1S3zM8XuOL1g01Y1IGI9gXfqBtT5kABnque9tKL6Ne 2iPSoe6PeRd3deHeXxyR4Yoxk5eAeh9BhKHjEL+qp3wxnCVFhMFDMrARzTVyr6opMpUF6rLNtiYKl Fac0jrv8SYGBtUXqx6Dh1zX+4VE5WWHNW1VxOcI/RQH4D/xgBZYucOFLiiRt2f+XcTPL7rU8cHoX5 Mhsm9uAgqx4CKNoD+k4A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1loCcQ-00101v-Sa; Tue, 01 Jun 2021 22:12:15 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1loCcN-00100I-Fs for linux-arm-kernel@lists.infradead.org; Tue, 01 Jun 2021 22:12:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=y8LwDyWYmv5YNXiWo6XrFDujLoYra5BDGywMvk5NFl4=; b=jlhGbIHApiEzg8PFSvdCwdNYui KPnwoVWetNNnsKN60MmkBoMmIIb87Wbd+txqaGZbkddmlO6FSTdIkZUY7ha14fhKxWuBm056Lphz3 EEq5Wg42Q4Glb60n0KCgtfJBUyFVsJ0w42esrPhiOxu7RuUo0bVQ+9ybBIPvwXWIkB+g=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1loCc9-007M0b-84; Wed, 02 Jun 2021 00:11:57 +0200 Date: Wed, 2 Jun 2021 00:11:57 +0200 From: Andrew Lunn To: Wong Vee Khee Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S . Miller" , Jakub Kicinski , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/1] net: stmmac: enable platform specific safety features Message-ID: References: <20210601135235.1058841-1-vee.khee.wong@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210601135235.1058841-1-vee.khee.wong@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210601_151211_561541_15F5DCFE X-CRM114-Status: UNSURE ( 7.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 01, 2021 at 09:52:35PM +0800, Wong Vee Khee wrote: > On Intel platforms, not all safety features are enabled on the hardware. Is it possible to read a register is determine what safety features have been synthesised? Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C708BC47092 for ; Tue, 1 Jun 2021 22:12:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A370561396 for ; Tue, 1 Jun 2021 22:12:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235006AbhFAWNx (ORCPT ); Tue, 1 Jun 2021 18:13:53 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:39694 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234740AbhFAWNv (ORCPT ); Tue, 1 Jun 2021 18:13:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=y8LwDyWYmv5YNXiWo6XrFDujLoYra5BDGywMvk5NFl4=; b=jlhGbIHApiEzg8PFSvdCwdNYui KPnwoVWetNNnsKN60MmkBoMmIIb87Wbd+txqaGZbkddmlO6FSTdIkZUY7ha14fhKxWuBm056Lphz3 EEq5Wg42Q4Glb60n0KCgtfJBUyFVsJ0w42esrPhiOxu7RuUo0bVQ+9ybBIPvwXWIkB+g=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1loCc9-007M0b-84; Wed, 02 Jun 2021 00:11:57 +0200 Date: Wed, 2 Jun 2021 00:11:57 +0200 From: Andrew Lunn To: Wong Vee Khee Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S . Miller" , Jakub Kicinski , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/1] net: stmmac: enable platform specific safety features Message-ID: References: <20210601135235.1058841-1-vee.khee.wong@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210601135235.1058841-1-vee.khee.wong@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 01, 2021 at 09:52:35PM +0800, Wong Vee Khee wrote: > On Intel platforms, not all safety features are enabled on the hardware. Is it possible to read a register is determine what safety features have been synthesised? Andrew