Re: [PATCH 2/4] clk: agilex/stratix10: fix bypass representation

[Greg KH <gregkh@linuxfoundation.org>]

On Wed, Jun 09, 2021 at 01:50:06PM -0500, Dinh Nguyen wrote:
> Each of these clocks(s2f_usr0/1, sdmmc_clk, gpio_db, emac_ptp,
> emac0/1/2) have a bypass setting that can use the boot_clk. The
> previous representation was not correct.
> 
> Fix the representation.
> 
> Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
>  drivers/clk/socfpga/clk-agilex.c | 57 ++++++++++++++++++++++++++------
>  drivers/clk/socfpga/clk-s10.c    | 55 ++++++++++++++++++++++++------
>  2 files changed, 91 insertions(+), 21 deletions(-)
> 

<formletter>

This is not the correct way to submit patches for inclusion in the
stable kernel tree.  Please read:
    https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.

</formletter>