diff for duplicates of <YPhDmZya2Up7fYNN@google.com> diff --git a/a/1.txt b/N1/1.txt index 5d6a4b6..e257c39 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -32,7 +32,8 @@ I don't think you're missing anything. I forgot that KVM_RUN would require an elevated mm_users. x86 does handle the impossible race, but that's coincidental. The extra protections in x86 are to deal with other cases where a vCPU's top-level SPTE can be invalidated while the vCPU is running. + _______________________________________________ -kvmarm mailing list -kvmarm@lists.cs.columbia.edu -https://lists.cs.columbia.edu/mailman/listinfo/kvmarm +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index df8e182..d7a1cdf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -7,14 +7,18 @@ "Subject\0Re: [PATCH 1/5] KVM: arm64: Walk userspace page tables to compute the THP mapping size\0" "Date\0Wed, 21 Jul 2021 15:56:09 +0000\0" "To\0Will Deacon <will@kernel.org>\0" - "Cc\0kernel-team@android.com" - kvm@vger.kernel.org + "Cc\0Alexandru Elisei <alexandru.elisei@arm.com>" Marc Zyngier <maz@kernel.org> - Matthew Wilcox <willy@infradead.org> + linux-arm-kernel@lists.infradead.org + kvm@vger.kernel.org + kvmarm@lists.cs.columbia.edu linux-mm@kvack.org + Matthew Wilcox <willy@infradead.org> Paolo Bonzini <pbonzini@redhat.com> - kvmarm@lists.cs.columbia.edu - " linux-arm-kernel@lists.infradead.org\0" + Quentin Perret <qperret@google.com> + James Morse <james.morse@arm.com> + Suzuki K Poulose <suzuki.poulose@arm.com> + " kernel-team@android.com\0" "\00:1\0" "b\0" "On Wed, Jul 21, 2021, Will Deacon wrote:\n" @@ -51,9 +55,10 @@ "elevated mm_users. x86 does handle the impossible race, but that's coincidental.\n" "The extra protections in x86 are to deal with other cases where a vCPU's top-level\n" "SPTE can be invalidated while the vCPU is running.\n" + "\n" "_______________________________________________\n" - "kvmarm mailing list\n" - "kvmarm@lists.cs.columbia.edu\n" - https://lists.cs.columbia.edu/mailman/listinfo/kvmarm + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -2693cc2af916749d2374914c90451fe430693cfb25ce783fd09eb0dd24f4cf2a +6e5cf8a27fab428e4c65130937c262b59dc8ccdf18ff523fa05cfac628ad8bd0
diff --git a/a/1.txt b/N2/1.txt index 5d6a4b6..d672664 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -32,7 +32,3 @@ I don't think you're missing anything. I forgot that KVM_RUN would require an elevated mm_users. x86 does handle the impossible race, but that's coincidental. The extra protections in x86 are to deal with other cases where a vCPU's top-level SPTE can be invalidated while the vCPU is running. -_______________________________________________ -kvmarm mailing list -kvmarm@lists.cs.columbia.edu -https://lists.cs.columbia.edu/mailman/listinfo/kvmarm diff --git a/a/content_digest b/N2/content_digest index df8e182..2f60f3d 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -7,14 +7,18 @@ "Subject\0Re: [PATCH 1/5] KVM: arm64: Walk userspace page tables to compute the THP mapping size\0" "Date\0Wed, 21 Jul 2021 15:56:09 +0000\0" "To\0Will Deacon <will@kernel.org>\0" - "Cc\0kernel-team@android.com" - kvm@vger.kernel.org + "Cc\0Alexandru Elisei <alexandru.elisei@arm.com>" Marc Zyngier <maz@kernel.org> - Matthew Wilcox <willy@infradead.org> + linux-arm-kernel@lists.infradead.org + kvm@vger.kernel.org + kvmarm@lists.cs.columbia.edu linux-mm@kvack.org + Matthew Wilcox <willy@infradead.org> Paolo Bonzini <pbonzini@redhat.com> - kvmarm@lists.cs.columbia.edu - " linux-arm-kernel@lists.infradead.org\0" + Quentin Perret <qperret@google.com> + James Morse <james.morse@arm.com> + Suzuki K Poulose <suzuki.poulose@arm.com> + " kernel-team@android.com\0" "\00:1\0" "b\0" "On Wed, Jul 21, 2021, Will Deacon wrote:\n" @@ -50,10 +54,6 @@ "I don't think you're missing anything. I forgot that KVM_RUN would require an\n" "elevated mm_users. x86 does handle the impossible race, but that's coincidental.\n" "The extra protections in x86 are to deal with other cases where a vCPU's top-level\n" - "SPTE can be invalidated while the vCPU is running.\n" - "_______________________________________________\n" - "kvmarm mailing list\n" - "kvmarm@lists.cs.columbia.edu\n" - https://lists.cs.columbia.edu/mailman/listinfo/kvmarm + SPTE can be invalidated while the vCPU is running. -2693cc2af916749d2374914c90451fe430693cfb25ce783fd09eb0dd24f4cf2a +6b15d88d077b21d603c8dca78353e0c66f60a6b3f0c8ed796c1fdb5e1c305d18
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