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Thu, 22 Jul 2021 02:12:01 -0700 (PDT) Received: from google.com ([2a00:79e0:d:210:efb1:2fcc:e84:52ad]) by smtp.gmail.com with ESMTPSA id f26sm24174882wmc.29.2021.07.22.02.12.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jul 2021 02:12:01 -0700 (PDT) Date: Thu, 22 Jul 2021 10:11:58 +0100 From: Quentin Perret To: Shameerali Kolothum Thodi Subject: Re: [PATCH v2 3/3] kvm/arm: Align the VMID allocation with the arm64 ASID one Message-ID: References: <20210616155606.2806-1-shameerali.kolothum.thodi@huawei.com> <20210616155606.2806-4-shameerali.kolothum.thodi@huawei.com> <20210721163138.GD11003@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Cc: "jean-philippe@linaro.org" , "catalin.marinas@arm.com" , "linux-kernel@vger.kernel.org" , Linuxarm , "maz@kernel.org" , Will Deacon , "kvmarm@lists.cs.columbia.edu" , "linux-arm-kernel@lists.infradead.org" X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thursday 22 Jul 2021 at 06:45:14 (+0000), Shameerali Kolothum Thodi wrote: > > From: Will Deacon [mailto:will@kernel.org] > > > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > index 4b60c0056c04..a02c4877a055 100644 > > > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > @@ -106,8 +106,7 @@ int kvm_host_prepare_stage2(void *mem_pgt_pool, > > void *dev_pgt_pool) > > > mmu->pgd_phys = __hyp_pa(host_kvm.pgt.pgd); > > > mmu->arch = &host_kvm.arch; > > > mmu->pgt = &host_kvm.pgt; > > > - mmu->vmid.vmid_gen = 0; > > > - mmu->vmid.vmid = 0; > > > + atomic64_set(&mmu->vmid.id, 0); > > > > I think this is the first atomic64 use in the EL2 object, which may pull in > > some fatal KCSAN instrumentation. Quentin, have you run into this before? > > > > Might be simple just to zero-initialise mmu for now, if it isn't already. > > I will check that. Yes I think what saves us here is that, AFAICT. arm64 doesn't support KCSAN yet. But the day it does, this should fail to link (hopefully) because of out-of-line calls into e.g. __kasan_check_write(). So yes, a simple zeroing here is probably preferable. Thanks, Quentin _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FSL_HELO_FAKE, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 659F5C6377D for ; Thu, 22 Jul 2021 09:13:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 31C326008E for ; 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Thu, 22 Jul 2021 02:12:01 -0700 (PDT) Date: Thu, 22 Jul 2021 10:11:58 +0100 From: Quentin Perret To: Shameerali Kolothum Thodi Cc: Will Deacon , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "linux-kernel@vger.kernel.org" , "maz@kernel.org" , "catalin.marinas@arm.com" , "james.morse@arm.com" , "julien.thierry.kdev@gmail.com" , "suzuki.poulose@arm.com" , "jean-philippe@linaro.org" , "Alexandru.Elisei@arm.com" , Linuxarm Subject: Re: [PATCH v2 3/3] kvm/arm: Align the VMID allocation with the arm64 ASID one Message-ID: References: <20210616155606.2806-1-shameerali.kolothum.thodi@huawei.com> <20210616155606.2806-4-shameerali.kolothum.thodi@huawei.com> <20210721163138.GD11003@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210722_021203_524171_9A73B936 X-CRM114-Status: GOOD ( 15.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thursday 22 Jul 2021 at 06:45:14 (+0000), Shameerali Kolothum Thodi wrote: > > From: Will Deacon [mailto:will@kernel.org] > > > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > index 4b60c0056c04..a02c4877a055 100644 > > > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > @@ -106,8 +106,7 @@ int kvm_host_prepare_stage2(void *mem_pgt_pool, > > void *dev_pgt_pool) > > > mmu->pgd_phys = __hyp_pa(host_kvm.pgt.pgd); > > > mmu->arch = &host_kvm.arch; > > > mmu->pgt = &host_kvm.pgt; > > > - mmu->vmid.vmid_gen = 0; > > > - mmu->vmid.vmid = 0; > > > + atomic64_set(&mmu->vmid.id, 0); > > > > I think this is the first atomic64 use in the EL2 object, which may pull in > > some fatal KCSAN instrumentation. Quentin, have you run into this before? > > > > Might be simple just to zero-initialise mmu for now, if it isn't already. > > I will check that. Yes I think what saves us here is that, AFAICT. arm64 doesn't support KCSAN yet. But the day it does, this should fail to link (hopefully) because of out-of-line calls into e.g. __kasan_check_write(). So yes, a simple zeroing here is probably preferable. Thanks, Quentin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FSL_HELO_FAKE, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 387BBC64980 for ; Thu, 22 Jul 2021 09:12:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 292CF61001 for ; Thu, 22 Jul 2021 09:12:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231421AbhGVIbm (ORCPT ); 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Thu, 22 Jul 2021 02:12:01 -0700 (PDT) Date: Thu, 22 Jul 2021 10:11:58 +0100 From: Quentin Perret To: Shameerali Kolothum Thodi Cc: Will Deacon , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "linux-kernel@vger.kernel.org" , "maz@kernel.org" , "catalin.marinas@arm.com" , "james.morse@arm.com" , "julien.thierry.kdev@gmail.com" , "suzuki.poulose@arm.com" , "jean-philippe@linaro.org" , "Alexandru.Elisei@arm.com" , Linuxarm Subject: Re: [PATCH v2 3/3] kvm/arm: Align the VMID allocation with the arm64 ASID one Message-ID: References: <20210616155606.2806-1-shameerali.kolothum.thodi@huawei.com> <20210616155606.2806-4-shameerali.kolothum.thodi@huawei.com> <20210721163138.GD11003@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 22 Jul 2021 at 06:45:14 (+0000), Shameerali Kolothum Thodi wrote: > > From: Will Deacon [mailto:will@kernel.org] > > > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > index 4b60c0056c04..a02c4877a055 100644 > > > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > > > @@ -106,8 +106,7 @@ int kvm_host_prepare_stage2(void *mem_pgt_pool, > > void *dev_pgt_pool) > > > mmu->pgd_phys = __hyp_pa(host_kvm.pgt.pgd); > > > mmu->arch = &host_kvm.arch; > > > mmu->pgt = &host_kvm.pgt; > > > - mmu->vmid.vmid_gen = 0; > > > - mmu->vmid.vmid = 0; > > > + atomic64_set(&mmu->vmid.id, 0); > > > > I think this is the first atomic64 use in the EL2 object, which may pull in > > some fatal KCSAN instrumentation. Quentin, have you run into this before? > > > > Might be simple just to zero-initialise mmu for now, if it isn't already. > > I will check that. Yes I think what saves us here is that, AFAICT. arm64 doesn't support KCSAN yet. But the day it does, this should fail to link (hopefully) because of out-of-line calls into e.g. __kasan_check_write(). So yes, a simple zeroing here is probably preferable. Thanks, Quentin