From: Rob Herring <robh@kernel.org>
To: "Jan Lübbe" <jlu@pengutronix.de>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Borislav Petkov <bp@alien8.de>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Tony Luck <tony.luck@intel.com>,
James Morse <james.morse@arm.com>,
Robert Richter <rric@kernel.org>,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] MAINTAINERS: EDAC/armada_xp: include dt-bindings
Date: Wed, 18 Aug 2021 11:33:26 -0500 [thread overview]
Message-ID: <YR02VkXGgsF7W7OU@robh.at.kernel.org> (raw)
In-Reply-To: <0f5ae210aab8ef5e00172928c341c0e6c88790a2.camel@pengutronix.de>
On Tue, Aug 17, 2021 at 12:50:22PM +0200, Jan Lübbe wrote:
> On Tue, 2021-08-17 at 11:38 +0200, Krzysztof Kozlowski wrote:
> > Include dt-bindings for Marvell Armada XP SDRAM and L2 cache ECC in the
> > EDAC-ARMADA entry.
>
> The L2 cache binding is already described in
> Documentation/devicetree/bindings/arm/l2c2x0.yaml, so this is only for the
> SDRAM.
Fixed up and applied.
Rob
next prev parent reply other threads:[~2021-08-18 16:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-17 9:38 [PATCH 1/2] dt-bindings: memory: convert Marvell MVEBU SDRAM controller to dtschema Krzysztof Kozlowski
2021-08-17 9:38 ` [PATCH 2/2] MAINTAINERS: EDAC/armada_xp: include dt-bindings Krzysztof Kozlowski
2021-08-17 10:50 ` Jan Lübbe
2021-08-18 16:33 ` Rob Herring [this message]
2021-08-17 10:46 ` [PATCH 1/2] dt-bindings: memory: convert Marvell MVEBU SDRAM controller to dtschema Jan Lübbe
2021-08-17 10:52 ` Krzysztof Kozlowski
2021-08-17 10:58 ` Jan Lübbe
2021-08-17 11:06 ` Krzysztof Kozlowski
2021-08-17 12:06 ` Jan Lübbe
2021-08-18 16:26 ` Rob Herring
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