diff for duplicates of <YRrbpRsvdDoom9iG@cmpxchg.org> diff --git a/a/1.txt b/N1/1.txt index c110518..bd704c5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -60,7 +60,7 @@ ones, anyway) inside struct cgroup_subsys_state for this workload. > > Seems this is the second case to hit 'adjacent cacheline prefetch", > the first time we saw it is also related with mem_cgroup -> https://lore.kernel.org/lkml/20201125062445.GA51005(a)shbuild999.sh.intel.com/ +> https://lore.kernel.org/lkml/20201125062445.GA51005@shbuild999.sh.intel.com/ > > In previous debug patch, the 'css.cgroup' and 'css.refcnt' is > separated to 2 cache lines, which are still adjacent (2N and 2N+1) diff --git a/a/content_digest b/N1/content_digest index 82b096c..277ece7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,27 @@ + "ref\020210811031734.GA5193@xsang-OptiPlex-9020\0" + "ref\0CAHk-=wiSHHSuSQsCCLOxQA+cbcvjmEeMsTCMWPT1sFVngd9-ig@mail.gmail.com\0" + "ref\020210812031910.GA63920@shbuild999.sh.intel.com\0" "ref\020210816032855.GB72770@shbuild999.sh.intel.com\0" "From\0Johannes Weiner <hannes@cmpxchg.org>\0" "Subject\0Re: [mm] 2d146aa3aa: vm-scalability.throughput -36.4% regression\0" "Date\0Mon, 16 Aug 2021 17:41:57 -0400\0" - "To\0lkp@lists.01.org\0" - "\01:1\0" + "To\0Feng Tang <feng.tang@intel.com>\0" + "Cc\0Linus Torvalds <torvalds@linux-foundation.org>" + kernel test robot <oliver.sang@intel.com> + Roman Gushchin <guro@fb.com> + Michal Hocko <mhocko@suse.com> + Shakeel Butt <shakeelb@google.com> + Michal Koutn?? <mkoutny@suse.com> + Balbir Singh <bsingharora@gmail.com> + Tejun Heo <tj@kernel.org> + Andrew Morton <akpm@linux-foundation.org> + LKML <linux-kernel@vger.kernel.org> + lkp@lists.01.org + kernel test robot <lkp@intel.com> + Huang + Ying <ying.huang@intel.com> + " Zhengjun Xing <zhengjun.xing@linux.intel.com>\0" + "\00:1\0" "b\0" "On Mon, Aug 16, 2021 at 11:28:55AM +0800, Feng Tang wrote:\n" "> On Thu, Aug 12, 2021 at 11:19:10AM +0800, Feng Tang wrote:\n" @@ -67,7 +85,7 @@ "> \n" "> Seems this is the second case to hit 'adjacent cacheline prefetch\",\n" "> the first time we saw it is also related with mem_cgroup\n" - "> https://lore.kernel.org/lkml/20201125062445.GA51005(a)shbuild999.sh.intel.com/\n" + "> https://lore.kernel.org/lkml/20201125062445.GA51005@shbuild999.sh.intel.com/\n" "> \n" "> In previous debug patch, the 'css.cgroup' and 'css.refcnt' is\n" "> separated to 2 cache lines, which are still adjacent (2N and 2N+1)\n" @@ -93,4 +111,4 @@ "We aren't particularly space-constrained in this structure, so padding\n" should generally be acceptable here. -f68d7c15ec7f77a2ec45be4b56ae293a7f7b1f305227c651a06717b5cf7d71a7 +005e7b909c564e129bead67cde6eb4a40bee6b691a5ddcf50ebf0e193e999065
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