From: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>,
xen-devel@lists.xenproject.org, "Wei Liu" <wl@xen.org>
Subject: Re: [PATCH] x86/xstate: reset cached register values on resume
Date: Wed, 18 Aug 2021 14:07:14 +0200 [thread overview]
Message-ID: <YRz38nFJpQ8hawC8@mail-itl> (raw)
In-Reply-To: <ed21b560-a52f-829b-e494-6d48438b6c3a@suse.com>
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On Wed, Aug 18, 2021 at 02:05:05PM +0200, Jan Beulich wrote:
> On 18.08.2021 13:30, Marek Marczykowski-Górecki wrote:
> > --- a/xen/arch/x86/xstate.c
> > +++ b/xen/arch/x86/xstate.c
> > @@ -642,6 +642,13 @@ void xstate_init(struct cpuinfo_x86 *c)
> > return;
> > }
> >
> > + /*
> > + * Clear the cached value to make set_xcr0() and set_msr_xss() really
> > + * write it.
> > + */
> > + this_cpu(xcr0) = 0;
>
> While XCR0 cannot be successfully written with 0, ...
>
> > + this_cpu(xss) = 0;
>
> ... XSS can. XSS can't be written with various other values; I'd
> suggest using ~0 here. Then
>
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
>
> and I'd be happy to make the adjustment while committing, so long
> as you agree.
Yes, makes sense. Thanks!
--
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab
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next prev parent reply other threads:[~2021-08-18 12:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-18 11:30 [PATCH] x86/xstate: reset cached register values on resume Marek Marczykowski-Górecki
2021-08-18 12:05 ` Jan Beulich
2021-08-18 12:07 ` Marek Marczykowski-Górecki [this message]
2021-08-18 12:44 ` Andrew Cooper
2021-08-19 11:41 ` Marek Marczykowski-Górecki
2021-08-24 21:11 ` Andrew Cooper
2021-08-25 15:02 ` Jan Beulich
2021-08-25 16:49 ` Andrew Cooper
2021-08-26 7:40 ` Jan Beulich
2021-08-26 8:50 ` Andrew Cooper
2021-10-18 8:21 ` Ping: " Jan Beulich
2021-10-21 13:44 ` Roger Pau Monné
2021-11-01 13:40 ` Marek Marczykowski-Górecki
2021-11-03 11:31 ` Jan Beulich
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