diff for duplicates of <YSTiUPQa+HYSA63t@robh.at.kernel.org> diff --git a/a/1.txt b/N1/1.txt index 4ca77f9..b90c2dd 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -26,19 +26,19 @@ On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote: > + - Billy Tsai <billy_tsai@aspeedtech.com> > + > +description: | -> + ? 10-bits resolution for 16 voltage channels. -> + ? The device split into two individual engine and each contains 8 voltage +> + • 10-bits resolution for 16 voltage channels. +> + • The device split into two individual engine and each contains 8 voltage > + channels. -> + ? Channel scanning can be non-continuous. -> + ? Programmable ADC clock frequency. -> + ? Programmable upper and lower threshold for each channels. -> + ? Interrupt when larger or less than threshold for each channels. -> + ? Support hysteresis for each channels. -> + ? Built-in a compensating method. -> + ? Built-in a register to trim internal reference voltage. -> + ? Internal or External reference voltage. -> + ? Support 2 Internal reference voltage 1.2v or 2.5v. -> + ? Integrate dividing circuit for battery sensing. +> + • Channel scanning can be non-continuous. +> + • Programmable ADC clock frequency. +> + • Programmable upper and lower threshold for each channels. +> + • Interrupt when larger or less than threshold for each channels. +> + • Support hysteresis for each channels. +> + • Built-in a compensating method. +> + • Built-in a register to trim internal reference voltage. +> + • Internal or External reference voltage. +> + • Support 2 Internal reference voltage 1.2v or 2.5v. +> + • Integrate dividing circuit for battery sensing. > + > +properties: > + compatible: @@ -108,7 +108,7 @@ And then you can drop this. > +examples: > + - | > + #include <dt-bindings/clock/ast2600-clock.h> -> + adc0: adc at 1e6e9000 { +> + adc0: adc@1e6e9000 { > + compatible = "aspeed,ast2600-adc0"; > + reg = <0x1e6e9000 0x100>; > + clocks = <&syscon ASPEED_CLK_APB2>; @@ -116,7 +116,7 @@ And then you can drop this. > + #io-channel-cells = <1>; > + aspeed,int_vref_mv = <2500>; > + }; -> + adc1: adc at 1e6e9100 { +> + adc1: adc@1e6e9100 { > + compatible = "aspeed,ast2600-adc1"; > + reg = <0x1e6e9100 0x100>; > + clocks = <&syscon ASPEED_CLK_APB2>; diff --git a/a/content_digest b/N1/content_digest index bcd38a3..aa68116 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,23 @@ "ref\020210823070240.12600-1-billy_tsai@aspeedtech.com\0" "ref\020210823070240.12600-2-billy_tsai@aspeedtech.com\0" "From\0Rob Herring <robh@kernel.org>\0" - "Subject\0[v4 01/15] dt-bindings: iio: adc: Add ast2600-adc bindings\0" + "Subject\0Re: [v4 01/15] dt-bindings: iio: adc: Add ast2600-adc bindings\0" "Date\0Tue, 24 Aug 2021 07:13:04 -0500\0" - "To\0linux-aspeed@lists.ozlabs.org\0" + "To\0Billy Tsai <billy_tsai@aspeedtech.com>\0" + "Cc\0jic23@kernel.org" + lars@metafoo.de + pmeerw@pmeerw.net + joel@jms.id.au + andrew@aj.id.au + p.zabel@pengutronix.de + lgirdwood@gmail.com + broonie@kernel.org + linux-iio@vger.kernel.org + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + linux-aspeed@lists.ozlabs.org + linux-kernel@vger.kernel.org + " BMC-SW@aspeedtech.com\0" "\00:1\0" "b\0" "On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote:\n" @@ -34,19 +48,19 @@ "> + - Billy Tsai <billy_tsai@aspeedtech.com>\n" "> +\n" "> +description: |\n" - "> + ? 10-bits resolution for 16 voltage channels.\n" - "> + ? The device split into two individual engine and each contains 8 voltage\n" + "> + \342\200\242 10-bits resolution for 16 voltage channels.\n" + "> + \342\200\242 The device split into two individual engine and each contains 8 voltage\n" "> + channels.\n" - "> + ? Channel scanning can be non-continuous.\n" - "> + ? Programmable ADC clock frequency.\n" - "> + ? Programmable upper and lower threshold for each channels.\n" - "> + ? Interrupt when larger or less than threshold for each channels.\n" - "> + ? Support hysteresis for each channels.\n" - "> + ? Built-in a compensating method.\n" - "> + ? Built-in a register to trim internal reference voltage.\n" - "> + ? Internal or External reference voltage.\n" - "> + ? Support 2 Internal reference voltage 1.2v or 2.5v.\n" - "> + ? Integrate dividing circuit for battery sensing.\n" + "> + \342\200\242 Channel scanning can be non-continuous.\n" + "> + \342\200\242 Programmable ADC clock frequency.\n" + "> + \342\200\242 Programmable upper and lower threshold for each channels.\n" + "> + \342\200\242 Interrupt when larger or less than threshold for each channels.\n" + "> + \342\200\242 Support hysteresis for each channels.\n" + "> + \342\200\242 Built-in a compensating method.\n" + "> + \342\200\242 Built-in a register to trim internal reference voltage.\n" + "> + \342\200\242 Internal or External reference voltage.\n" + "> + \342\200\242 Support 2 Internal reference voltage 1.2v or 2.5v.\n" + "> + \342\200\242 Integrate dividing circuit for battery sensing.\n" "> +\n" "> +properties:\n" "> + compatible:\n" @@ -116,7 +130,7 @@ "> +examples:\n" "> + - |\n" "> + #include <dt-bindings/clock/ast2600-clock.h>\n" - "> + adc0: adc at 1e6e9000 {\n" + "> + adc0: adc@1e6e9000 {\n" "> + compatible = \"aspeed,ast2600-adc0\";\n" "> + reg = <0x1e6e9000 0x100>;\n" "> + clocks = <&syscon ASPEED_CLK_APB2>;\n" @@ -124,7 +138,7 @@ "> + #io-channel-cells = <1>;\n" "> + aspeed,int_vref_mv = <2500>;\n" "> + };\n" - "> + adc1: adc at 1e6e9100 {\n" + "> + adc1: adc@1e6e9100 {\n" "> + compatible = \"aspeed,ast2600-adc1\";\n" "> + reg = <0x1e6e9100 0x100>;\n" "> + clocks = <&syscon ASPEED_CLK_APB2>;\n" @@ -138,4 +152,4 @@ "> \n" > -ee4658a3847f51f440a78ec58f56aac5222ffece1bf7c1f2ffe2d371e3c9010d +67a06ab141e50b845c9e41aae9f72f9b5f4d3a427a554a04284557dea948cbc7
diff --git a/a/1.txt b/N2/1.txt index 4ca77f9..3b537f1 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -26,19 +26,19 @@ On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote: > + - Billy Tsai <billy_tsai@aspeedtech.com> > + > +description: | -> + ? 10-bits resolution for 16 voltage channels. -> + ? The device split into two individual engine and each contains 8 voltage +> + • 10-bits resolution for 16 voltage channels. +> + • The device split into two individual engine and each contains 8 voltage > + channels. -> + ? Channel scanning can be non-continuous. -> + ? Programmable ADC clock frequency. -> + ? Programmable upper and lower threshold for each channels. -> + ? Interrupt when larger or less than threshold for each channels. -> + ? Support hysteresis for each channels. -> + ? Built-in a compensating method. -> + ? Built-in a register to trim internal reference voltage. -> + ? Internal or External reference voltage. -> + ? Support 2 Internal reference voltage 1.2v or 2.5v. -> + ? Integrate dividing circuit for battery sensing. +> + • Channel scanning can be non-continuous. +> + • Programmable ADC clock frequency. +> + • Programmable upper and lower threshold for each channels. +> + • Interrupt when larger or less than threshold for each channels. +> + • Support hysteresis for each channels. +> + • Built-in a compensating method. +> + • Built-in a register to trim internal reference voltage. +> + • Internal or External reference voltage. +> + • Support 2 Internal reference voltage 1.2v or 2.5v. +> + • Integrate dividing circuit for battery sensing. > + > +properties: > + compatible: @@ -108,7 +108,7 @@ And then you can drop this. > +examples: > + - | > + #include <dt-bindings/clock/ast2600-clock.h> -> + adc0: adc at 1e6e9000 { +> + adc0: adc@1e6e9000 { > + compatible = "aspeed,ast2600-adc0"; > + reg = <0x1e6e9000 0x100>; > + clocks = <&syscon ASPEED_CLK_APB2>; @@ -116,7 +116,7 @@ And then you can drop this. > + #io-channel-cells = <1>; > + aspeed,int_vref_mv = <2500>; > + }; -> + adc1: adc at 1e6e9100 { +> + adc1: adc@1e6e9100 { > + compatible = "aspeed,ast2600-adc1"; > + reg = <0x1e6e9100 0x100>; > + clocks = <&syscon ASPEED_CLK_APB2>; @@ -128,4 +128,9 @@ And then you can drop this. > -- > 2.25.1 > -> +> + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N2/content_digest index bcd38a3..0aba87d 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,23 @@ "ref\020210823070240.12600-1-billy_tsai@aspeedtech.com\0" "ref\020210823070240.12600-2-billy_tsai@aspeedtech.com\0" "From\0Rob Herring <robh@kernel.org>\0" - "Subject\0[v4 01/15] dt-bindings: iio: adc: Add ast2600-adc bindings\0" + "Subject\0Re: [v4 01/15] dt-bindings: iio: adc: Add ast2600-adc bindings\0" "Date\0Tue, 24 Aug 2021 07:13:04 -0500\0" - "To\0linux-aspeed@lists.ozlabs.org\0" + "To\0Billy Tsai <billy_tsai@aspeedtech.com>\0" + "Cc\0jic23@kernel.org" + lars@metafoo.de + pmeerw@pmeerw.net + joel@jms.id.au + andrew@aj.id.au + p.zabel@pengutronix.de + lgirdwood@gmail.com + broonie@kernel.org + linux-iio@vger.kernel.org + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + linux-aspeed@lists.ozlabs.org + linux-kernel@vger.kernel.org + " BMC-SW@aspeedtech.com\0" "\00:1\0" "b\0" "On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote:\n" @@ -34,19 +48,19 @@ "> + - Billy Tsai <billy_tsai@aspeedtech.com>\n" "> +\n" "> +description: |\n" - "> + ? 10-bits resolution for 16 voltage channels.\n" - "> + ? The device split into two individual engine and each contains 8 voltage\n" + "> + \342\200\242 10-bits resolution for 16 voltage channels.\n" + "> + \342\200\242 The device split into two individual engine and each contains 8 voltage\n" "> + channels.\n" - "> + ? Channel scanning can be non-continuous.\n" - "> + ? Programmable ADC clock frequency.\n" - "> + ? Programmable upper and lower threshold for each channels.\n" - "> + ? Interrupt when larger or less than threshold for each channels.\n" - "> + ? Support hysteresis for each channels.\n" - "> + ? Built-in a compensating method.\n" - "> + ? Built-in a register to trim internal reference voltage.\n" - "> + ? Internal or External reference voltage.\n" - "> + ? Support 2 Internal reference voltage 1.2v or 2.5v.\n" - "> + ? Integrate dividing circuit for battery sensing.\n" + "> + \342\200\242 Channel scanning can be non-continuous.\n" + "> + \342\200\242 Programmable ADC clock frequency.\n" + "> + \342\200\242 Programmable upper and lower threshold for each channels.\n" + "> + \342\200\242 Interrupt when larger or less than threshold for each channels.\n" + "> + \342\200\242 Support hysteresis for each channels.\n" + "> + \342\200\242 Built-in a compensating method.\n" + "> + \342\200\242 Built-in a register to trim internal reference voltage.\n" + "> + \342\200\242 Internal or External reference voltage.\n" + "> + \342\200\242 Support 2 Internal reference voltage 1.2v or 2.5v.\n" + "> + \342\200\242 Integrate dividing circuit for battery sensing.\n" "> +\n" "> +properties:\n" "> + compatible:\n" @@ -116,7 +130,7 @@ "> +examples:\n" "> + - |\n" "> + #include <dt-bindings/clock/ast2600-clock.h>\n" - "> + adc0: adc at 1e6e9000 {\n" + "> + adc0: adc@1e6e9000 {\n" "> + compatible = \"aspeed,ast2600-adc0\";\n" "> + reg = <0x1e6e9000 0x100>;\n" "> + clocks = <&syscon ASPEED_CLK_APB2>;\n" @@ -124,7 +138,7 @@ "> + #io-channel-cells = <1>;\n" "> + aspeed,int_vref_mv = <2500>;\n" "> + };\n" - "> + adc1: adc at 1e6e9100 {\n" + "> + adc1: adc@1e6e9100 {\n" "> + compatible = \"aspeed,ast2600-adc1\";\n" "> + reg = <0x1e6e9100 0x100>;\n" "> + clocks = <&syscon ASPEED_CLK_APB2>;\n" @@ -136,6 +150,11 @@ "> -- \n" "> 2.25.1\n" "> \n" - > + "> \n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -ee4658a3847f51f440a78ec58f56aac5222ffece1bf7c1f2ffe2d371e3c9010d +3232af258be32ffc55c62068e131220f7ff59d28716acad012be540ecaa2a48a
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