From: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: linux-pci@vger.kernel.org, stable@vger.kernel.org,
xen-devel <xen-devel@lists.xenproject.org>,
Thomas Gleixner <tglx@linutronix.de>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: Kernel panic in __pci_enable_msix_range on Xen PV with PCI passthrough
Date: Thu, 26 Aug 2021 03:28:28 +0200 [thread overview]
Message-ID: <YSbuPJSZxiKSSaqT@mail-itl> (raw)
In-Reply-To: <24d47a06-a887-05e5-0e3f-ed3cdd19490b@suse.com>
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On Wed, Aug 25, 2021 at 05:55:09PM +0200, Jan Beulich wrote:
> On 25.08.2021 17:47, Marek Marczykowski-Górecki wrote:
> > If so, I guess the issue is the kernel trying to write directly, instead
> > of via some hypercall, right?
>
> Indeed. Or to be precise - the kernel isn't supposed to be "writing" this
> at all. It is supposed to make hypercalls which may result in such writes.
> Such "mask everything" functionality imo is the job of the hypervisor
> anyway when talking about PV environments; HVM is a different thing here.
Ok, I dug a bit and found why it was working before: there is
pci_mask_ignore_mask variable, that is set to 1 for Xen PV (and only
then). This bypassed __pci_msi{x,}_desc_mask_irq(), but does not bypass the
new msix_mask_all().
Adding that check back fixes the issue - no crash, the device works,
although the driver doesn't seem to enable MSI/MSI-X (but that wasn't
the case before either).
--
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab
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prev parent reply other threads:[~2021-08-26 1:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 15:24 Kernel panic in __pci_enable_msix_range on Xen PV with PCI passthrough Marek Marczykowski-Górecki
2021-08-25 15:33 ` Jan Beulich
2021-08-25 15:47 ` Marek Marczykowski-Górecki
2021-08-25 15:55 ` Jan Beulich
2021-08-26 1:28 ` Marek Marczykowski-Górecki [this message]
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