From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66723C433F5 for ; Sat, 11 Sep 2021 19:10:14 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B968610A3 for ; Sat, 11 Sep 2021 19:10:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3B968610A3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4H6Mkq3v4Yz2yfr for ; Sun, 12 Sep 2021 05:10:11 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=TvryW/tW; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=198.145.29.99; helo=mail.kernel.org; envelope-from=acme@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=TvryW/tW; dkim-atps=neutral Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4H6Mk300lQz2yJJ for ; Sun, 12 Sep 2021 05:09:30 +1000 (AEST) Received: by mail.kernel.org (Postfix) with ESMTPSA id 589EE610A3; Sat, 11 Sep 2021 19:09:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1631387367; bh=MF42YbZBgwTYjRBQBamaFsBEIo0do1nPUzzz7HHFc9Y=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TvryW/tWuHrwFGhnauTlHeKULUUpGnvvChQOB/DS8wK71z6KBM9LfA9Q5mvMhrXLs 7F0Ww6JWLcPSuUOib8/Q+ViWfUswVLnBln77X+kv7TXUJNVs2snI5dRCofhxJLpsmZ jJZMaqXIeb38dc1s+uMit9lMrPNNE3/y0PPXyMyVDb+D5mHoMLl7B7n5Rgl/i3qcAO WrgVShin9VnniDWEn5B3yo+/6H0YaMLj43EvdaH69GrohlG39h46+/USgunjT9yj0V glIfE0KTR4FGW5hHOSB0HwNWQkCCvXUddpOOIYo7FlofkOMV3HrVPbfEO63l7NND87 1EMAVdLK9B5lQ== Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 66FAE4038F; Sat, 11 Sep 2021 16:09:24 -0300 (-03) Date: Sat, 11 Sep 2021 16:09:24 -0300 From: Arnaldo Carvalho de Melo To: Athira Rajeev Subject: Re: [PATCH 0/2] powerpc/perf: Add instruction and data address registers to extended regs Message-ID: References: <1624200360-1429-1-git-send-email-atrajeev@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Url: http://acmel.wordpress.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Madhavan Srinivasan , rnsastry@linux.ibm.com, kajoljain , Jiri Olsa , linuxppc-dev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Em Mon, Sep 06, 2021 at 08:13:13AM +0530, Athira Rajeev escreveu: > > > > On 02-Sep-2021, at 1:04 PM, kajoljain wrote: > > > > > > > > On 6/20/21 8:15 PM, Athira Rajeev wrote: > >> Patch set adds PMU registers namely Sampled Instruction Address Register > >> (SIAR) and Sampled Data Address Register (SDAR) as part of extended regs > >> in PowerPC. These registers provides the instruction/data address and > >> adding these to extended regs helps in debug purposes. > >> > >> Patch 1/2 adds SIAR and SDAR as part of the extended regs mask. > >> Patch 2/2 includes perf tools side changes to add the SPRs to > >> sample_reg_mask to use with -I? option. > >> > >> Athira Rajeev (2): > >> powerpc/perf: Expose instruction and data address registers as part of > >> extended regs > >> tools/perf: Add perf tools support to expose instruction and data > >> address registers as part of extended regs > >> > > > > Patchset looks good to me. > > > > Reviewed-By: kajol Jain > > Hi Arnaldo, > > Requesting for your review on this patchset. So, this touches the kernel, usually I get a patchkit when the kernel bits landed, is that the case by now? - Arnaldo > > Thanks > Athira > > > > Thanks, > > Kajol Jain > > > >> arch/powerpc/include/uapi/asm/perf_regs.h | 12 +++++++----- > >> arch/powerpc/perf/perf_regs.c | 4 ++++ > >> tools/arch/powerpc/include/uapi/asm/perf_regs.h | 12 +++++++----- > >> tools/perf/arch/powerpc/include/perf_regs.h | 2 ++ > >> tools/perf/arch/powerpc/util/perf_regs.c | 2 ++ > >> 5 files changed, 22 insertions(+), 10 deletions(-) -- - Arnaldo