From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915/display: Add new fb_op_origin type and use it to optimize power savings
Date: Fri, 24 Sep 2021 17:39:59 +0300 [thread overview]
Message-ID: <YU3jP1fUHPJcxvR+@intel.com> (raw)
In-Reply-To: <20210923194617.69136-3-jose.souza@intel.com>
On Thu, Sep 23, 2021 at 12:46:13PM -0700, José Roberto de Souza wrote:
> intel_prepare_plane_fb() was calling i915_gem_object_flush_frontbuffer()
> with the generic ORIGIN_DIRTYFB, what was causing
> PSR, FBC and DRRS to do their frontbuffer rendering in a framebuffer
> that will be flipped.
>
> Not handling this call as frontbuffer rendering allow us to save
> more power with all 3 features.
>
> Same applies when allocating a framebuffer for fbdev emulation, after
> allocation userspace will draw on it and trigger invaldate/flush calls
> with ORIGIN_DIRTYFB.
>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 5 ++++-
> drivers/gpu/drm/i915/display/intel_drrs.h | 4 +++-
> drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
> drivers/gpu/drm/i915/display/intel_frontbuffer.c | 2 +-
> drivers/gpu/drm/i915/display/intel_frontbuffer.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 5 ++++-
> 8 files changed, 16 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f27c294beb926..ecf8c69473e38 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10666,7 +10666,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
> return ret;
>
> i915_gem_object_wait_priority(obj, 0, &attr);
> - i915_gem_object_flush_frontbuffer(obj, ORIGIN_DIRTYFB);
> + i915_gem_object_flush_frontbuffer(obj, ORIGIN_PREPARE_FB);
I think this should just get nuked. See
https://patchwork.freedesktop.org/patch/432166/?series=89824&rev=1
Unfortunately I wasn't able to get past glk's semi-borked
FBC with that yet.
>
> if (!new_plane_state->uapi.fence) { /* implicit fencing */
> struct dma_fence *fence;
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index c1439fcb5a959..46828222a098b 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -373,8 +373,11 @@ void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
> * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
> */
> void intel_drrs_flush(struct drm_i915_private *dev_priv,
> - unsigned int frontbuffer_bits)
> + unsigned int frontbuffer_bits, enum fb_op_origin origin)
> {
> + if (origin == ORIGIN_PREPARE_FB)
> + return;
> +
> intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, false);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.h b/drivers/gpu/drm/i915/display/intel_drrs.h
> index 9ec9c447211af..e69528a98a9c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.h
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.h
> @@ -8,6 +8,8 @@
>
> #include <linux/types.h>
>
> +#include "intel_frontbuffer.h"
> +
> struct drm_i915_private;
> struct intel_atomic_state;
> struct intel_crtc;
> @@ -24,7 +26,7 @@ void intel_drrs_update(struct intel_dp *intel_dp,
> void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
> unsigned int frontbuffer_bits);
> void intel_drrs_flush(struct drm_i915_private *dev_priv,
> - unsigned int frontbuffer_bits);
> + unsigned int frontbuffer_bits, enum fb_op_origin origin);
> void intel_drrs_page_flip(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
> void intel_drrs_compute_config(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index b1c1a23c36be3..56c2de2994602 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1155,7 +1155,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
>
> fbc->busy_bits &= ~frontbuffer_bits;
>
> - if (origin == ORIGIN_FLIP)
> + if (origin == ORIGIN_FLIP || origin == ORIGIN_PREPARE_FB)
> goto out;
>
> if (!fbc->busy_bits && fbc->crtc &&
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 60d3ded270476..3097658938ae2 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -230,7 +230,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
> goto out_unlock;
> }
>
> - intel_frontbuffer_flush(to_frontbuffer(ifbdev), ORIGIN_DIRTYFB);
> + intel_frontbuffer_flush(to_frontbuffer(ifbdev), ORIGIN_PREPARE_FB);
>
> info = drm_fb_helper_alloc_fbi(helper);
> if (IS_ERR(info)) {
> diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> index 0492446cd04ad..a88c147d6b523 100644
> --- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> +++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> @@ -92,7 +92,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
> trace_intel_frontbuffer_flush(frontbuffer_bits, origin);
>
> might_sleep();
> - intel_drrs_flush(i915, frontbuffer_bits);
> + intel_drrs_flush(i915, frontbuffer_bits, origin);
> intel_psr_flush(i915, frontbuffer_bits, origin);
> intel_fbc_flush(i915, frontbuffer_bits, origin);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.h b/drivers/gpu/drm/i915/display/intel_frontbuffer.h
> index 4b977c1e4d52b..950030950b0f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_frontbuffer.h
> +++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.h
> @@ -37,6 +37,7 @@ enum fb_op_origin {
> ORIGIN_CS,
> ORIGIN_FLIP,
> ORIGIN_DIRTYFB,
> + ORIGIN_PREPARE_FB,
> };
>
> struct intel_frontbuffer {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index ba2da689920f9..1cc4130dec7b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2073,7 +2073,7 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
> {
> struct intel_encoder *encoder;
>
> - if (origin == ORIGIN_FLIP)
> + if (origin == ORIGIN_FLIP || origin == ORIGIN_PREPARE_FB)
> return;
>
> for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
> @@ -2148,6 +2148,9 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
> {
> struct intel_encoder *encoder;
>
> + if (origin == ORIGIN_PREPARE_FB)
> + return;
> +
> for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
> unsigned int pipe_frontbuffer_bits = frontbuffer_bits;
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> --
> 2.33.0
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2021-09-24 14:40 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 19:46 [Intel-gfx] [PATCH 1/7] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe José Roberto de Souza
2021-09-23 19:46 ` [Intel-gfx] [PATCH 2/7] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled José Roberto de Souza
2021-09-29 12:40 ` Gwan-gyeong Mun
2021-09-23 19:46 ` [Intel-gfx] [PATCH 3/7] drm/i915/display: Add new fb_op_origin type and use it to optimize power savings José Roberto de Souza
2021-09-24 14:39 ` Ville Syrjälä [this message]
2021-09-24 17:11 ` Souza, Jose
2021-09-23 19:46 ` [Intel-gfx] [PATCH 4/7] drm/i915/display/psr: Handle plane restrictions at every page flip José Roberto de Souza
2021-09-29 17:50 ` Gwan-gyeong Mun
2021-09-29 18:20 ` Ville Syrjälä
2021-09-30 5:35 ` Gwan-gyeong Mun
2021-09-30 6:55 ` Ville Syrjälä
2021-09-23 19:46 ` [Intel-gfx] [PATCH 5/7] drm/i915/display/psr: Do full fetch when handling biplanar formats José Roberto de Souza
2021-09-24 14:41 ` Ville Syrjälä
2021-09-23 19:46 ` [Intel-gfx] [PATCH 6/7] drm/i915/display/adlp: Allow PSR2 to be enabled José Roberto de Souza
2021-09-29 13:29 ` Gwan-gyeong Mun
2021-09-23 19:46 ` [Intel-gfx] [PATCH 7/7] drm/i915/display: Enable PSR2 selective fetch by default José Roberto de Souza
2021-09-29 13:26 ` Gwan-gyeong Mun
2021-09-23 20:44 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/7] drm/i915/display: Wait PSR2 get out of deep sleep to update pipe Patchwork
2021-09-23 21:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-24 1:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-24 14:35 ` [Intel-gfx] [PATCH 1/7] " Ville Syrjälä
2021-09-24 17:10 ` Souza, Jose
2021-09-27 16:25 ` Ville Syrjälä
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