From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53194C433FE for ; Tue, 21 Sep 2021 09:45:59 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADDEF60F6E for ; Tue, 21 Sep 2021 09:45:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org ADDEF60F6E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:46814 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mScLd-0003xm-L0 for qemu-devel@archiver.kernel.org; Tue, 21 Sep 2021 05:45:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53486) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mScEb-0008Kz-TE; Tue, 21 Sep 2021 05:38:43 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:33781) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mScEX-000072-GO; Tue, 21 Sep 2021 05:38:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gibson.dropbear.id.au; s=201602; t=1632217112; bh=Ze007ehXEkA5V8N29lUPvbArcpjsrAzcxYGOJmHAa/I=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WSaKE2RpTVRlx1KdSxQ99LMan92kcfcDNKQKTCDHMV4SySZt4v6AHPQITnn9teYTQ /ij2pPTe4tWv7MRZtFpfzFqO0Nyf96pZyapvtrL84WAwxBlNghq7PXMUyh/2korTqO oub9PaqL9Va0KuPjT+n9/3y91k0RgQj+GmrLnKx8= Received: by ozlabs.org (Postfix, from userid 1007) id 4HDGZc1X8Dz9t10; Tue, 21 Sep 2021 19:38:32 +1000 (AEST) Date: Tue, 21 Sep 2021 19:31:46 +1000 From: David Gibson To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Subject: Re: [RESEND PATCH 1/3] hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset Message-ID: References: <20210918032653.646370-1-bin.meng@windriver.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="24Llks9Dz2oDPOes" Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maarten Koning , Mark Cave-Ayland , Greg Kurz , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, =?iso-8859-1?Q?C=E9dric?= Le Goater , Bin Meng Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --24Llks9Dz2oDPOes Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Sep 21, 2021 at 10:13:36AM +0200, Philippe Mathieu-Daud=E9 wrote: > On 9/21/21 05:25, David Gibson wrote: > > On Sat, Sep 18, 2021 at 11:26:51AM +0800, Bin Meng wrote: > > > The reset value of IPIDR should be zero for Freescale chipset, per > > > the following 2 manuals I checked: > > >=20 > > > - P2020RM (https://www.nxp.com/webapp/Download?colCode=3DP2020RM) > > > - P4080RM (https://www.nxp.com/webapp/Download?colCode=3DP4080RM) > > >=20 > > > Currently it is set to 1, which leaves the IPI enabled on core 0 > > > after power-on reset. Such may cause unexpected interrupt to be > > > delivered to core 0 if the IPI is triggered from core 0 to other > > > cores later. > > >=20 > > > Fixes: ffd5e9fe0276 ("openpic: Reset IRQ source private members") > > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/584 > > > Signed-off-by: Bin Meng > >=20 > > Since these patches are very simple and look sensible, I've applied > > them to ppc-for-6.2. > >=20 > > However, you should note that Greg and I are both moving into other > > areas and don't have much capacity for ppc maintainership any more. > > Therefore I'll shortly be sending some MAINTAINERS updates moving > > openpic (amongst other things) to "Orphan" status. >=20 > I'm not trying to force Bin to become (yet) another maintainer, > but from his previous contributions, he demonstrated a very good > knowledge of embedded PowerPC ISA & chipsets, his patches have good > quality and description, and he is consistent over time in his > contributions. So if he is interested, I'd vouch for him as a > maintainer for embedded ppc. Now up to him, his time and/or employer > :) Ok, works for me if he's interested. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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