All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2 2/9] drm/i915/display/psr: Do full fetch when handling multi-planar formats
Date: Thu, 30 Sep 2021 15:58:43 +0300	[thread overview]
Message-ID: <YVW0gyVk2/5j1Xmv@intel.com> (raw)
In-Reply-To: <20210930001409.254817-2-jose.souza@intel.com>

On Wed, Sep 29, 2021 at 05:14:02PM -0700, José Roberto de Souza wrote:
> From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> 
> We are still missing the PSR2 selective fetch handling of multi-planar
> formats but until proper handle is added we can workaround it by
> doing full frames fetch when state has such formats.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index e3af1dc358bd2..8534cbb0d5144 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1573,6 +1573,9 @@ static void cursor_area_workaround(const struct intel_plane_state *new_plane_sta
>   * also planes are not updated if they have a negative X
>   * position so for now doing a full update in this cases
>   *
> + * TODO: We are missing multi-planar formats handling, until it is
> + * implemented it will send full frame updates.
> + *
>   * Plane scaling and rotation is not supported by selective fetch and both
>   * properties can change without a modeset, so need to be check at every
>   * atomic commmit.
> @@ -1582,6 +1585,7 @@ static bool psr2_sel_fetch_plane_state_supported(const struct intel_plane_state
>  	if (plane_state->uapi.dst.y1 < 0 ||
>  	    plane_state->uapi.dst.x1 < 0 ||
>  	    plane_state->scaler_id >= 0 ||
> +	    plane_state->hw.fb->format->num_planes > 1 ||

This also catches ccs forrmats, but I guess for the moment that's what
we want if we haven't thought about AUX_DIST and whatnot in relation to
selective fetch.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	    plane_state->uapi.rotation != DRM_MODE_ROTATE_0)
>  		return false;
>  
> -- 
> 2.33.0

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2021-09-30 12:58 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30  0:14 [Intel-gfx] [PATCH v2 1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip José Roberto de Souza
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 2/9] drm/i915/display/psr: Do full fetch when handling multi-planar formats José Roberto de Souza
2021-09-30 12:58   ` Ville Syrjälä [this message]
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 3/9] drm/i915/display: Drop unnecessary frontbuffer flushes José Roberto de Souza
2021-09-30  7:41   ` Ville Syrjälä
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 4/9] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled José Roberto de Souza
2021-09-30  7:17   ` Gwan-gyeong Mun
2021-09-30 18:02     ` Souza, Jose
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 5/9] drm/i915/display: Fix glitches when moving cursor with PSR2 selective fetch enabled José Roberto de Souza
2021-09-30  7:56   ` Ville Syrjälä
2021-09-30 17:34     ` Gwan-gyeong Mun
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 6/9] drm/i915/display/adlp: Optimize PSR2 power-savings in corner cases José Roberto de Souza
2021-09-30  7:35   ` Gwan-gyeong Mun
2021-09-30 18:03     ` Souza, Jose
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 7/9] drm/i915/display/adlp: Allow PSR2 to be enabled José Roberto de Souza
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 8/9] drm/i915/display: Enable PSR2 selective fetch by default José Roberto de Souza
2021-09-30  0:14 ` [Intel-gfx] [PATCH v2 9/9] drm/i915/display: Always wait vblank counter to increment when commit needs a modeset José Roberto de Souza
2021-09-30  7:58   ` Ville Syrjälä
2021-09-30  0:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip Patchwork
2021-09-30  0:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-30  2:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-30 16:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/9] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip (rev2) Patchwork
2021-09-30 17:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-30 21:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YVW0gyVk2/5j1Xmv@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=gwan-gyeong.mun@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jose.souza@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.