diff for duplicates of <YWRLBknWXjzPnF1w@google.com>

diff --git a/a/1.txt b/N1/1.txt
index 08dfa35..c2b9b80 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,38 +1,38 @@
 On Mon, Oct 11, 2021, Atish Patra wrote:
 > On Fri, 2021-10-08 at 15:02 +0000, Sean Christopherson wrote:
 > > On Thu, Oct 07, 2021, Atish Patra wrote:
-> > > +???????preempt_disable();
-> > > +???????loaded = (vcpu->cpu != -1);
-> > > +???????if (loaded)
-> > > +???????????????kvm_arch_vcpu_put(vcpu);
+> > > +       preempt_disable();
+> > > +       loaded = (vcpu->cpu != -1);
+> > > +       if (loaded)
+> > > +               kvm_arch_vcpu_put(vcpu);
 > > 
-> > Oof.? Looks like this pattern was taken from arm64.?
+> > Oof.  Looks like this pattern was taken from arm64. 
 > 
 > Yes. This part is similar to arm64 because the same race condition can
 > happen in riscv due to save/restore of CSRs during reset.
 > 
 > 
-> >  Is there really no better approach to handling this?? I don't see anything
+> >  Is there really no better approach to handling this?  I don't see anything
 > >  in kvm_riscv_reset_vcpu() that will obviously break if the vCPU is
-> >  loaded.? If the goal is purely to effect a CSR reset via
+> >  loaded.  If the goal is purely to effect a CSR reset via
 > >  kvm_arch_vcpu_load(), then why not just factor out a helper to do exactly
 > >  that?
 
 What about the question here?
 
 > > 
-> > > ?
-> > > ????????memcpy(csr, reset_csr, sizeof(*csr));
-> > > ?
+> > >  
+> > >         memcpy(csr, reset_csr, sizeof(*csr));
+> > >  
 > > > @@ -144,6 +151,11 @@ static void kvm_riscv_reset_vcpu(struct
 > > > kvm_vcpu *vcpu)
-> > > ?
-> > > ????????WRITE_ONCE(vcpu->arch.irqs_pending, 0);
-> > > ????????WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);
+> > >  
+> > >         WRITE_ONCE(vcpu->arch.irqs_pending, 0);
+> > >         WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);
 > > > +
-> > > +???????/* Reset the guest CSRs for hotplug usecase */
-> > > +???????if (loaded)
-> > > +???????????????kvm_arch_vcpu_load(vcpu, smp_processor_id());
+> > > +       /* Reset the guest CSRs for hotplug usecase */
+> > > +       if (loaded)
+> > > +               kvm_arch_vcpu_load(vcpu, smp_processor_id());
 > > 
 > > If the preempt shenanigans really have to stay, at least use
 > > get_cpu()/put_cpu().
@@ -51,23 +51,23 @@ What about the question here?
 It would make the code a bit self-documenting, because AFAICT it doesn't truly
 care about being preempted, it cares about keeping the vCPU on the correct pCPU.
 
-> > > +???????preempt_enable();
-> > > ?}
-> > > ?
-> > > ?int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
+> > > +       preempt_enable();
+> > >  }
+> > >  
+> > >  int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
 > > > @@ -180,6 +192,13 @@ int kvm_arch_vcpu_create(struct kvm_vcpu
 > > > *vcpu)
-> > > ?
-> > > ?void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
-> > > ?{
-> > > +???????/**
-> > > +??????? * vcpu with id 0 is the designated boot cpu.
-> > > +??????? * Keep all vcpus with non-zero cpu id in power-off state
+> > >  
+> > >  void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
+> > >  {
+> > > +       /**
+> > > +        * vcpu with id 0 is the designated boot cpu.
+> > > +        * Keep all vcpus with non-zero cpu id in power-off state
 > > > so that they
-> > > +??????? * can brought to online using SBI HSM extension.
-> > > +??????? */
-> > > +???????if (vcpu->vcpu_idx != 0)
-> > > +???????????????kvm_riscv_vcpu_power_off(vcpu);
+> > > +        * can brought to online using SBI HSM extension.
+> > > +        */
+> > > +       if (vcpu->vcpu_idx != 0)
+> > > +               kvm_riscv_vcpu_power_off(vcpu);
 > > 
 > > Why do this in postcreate?
 > > 
@@ -81,3 +81,8 @@ But kvm_riscv_vcpu_power_off() doesn't doesn't anything outside of the vCPU.  It
 clears vcpu->arch.power_off, makes a request, and kicks the vCPU.  None of that
 has side effects to anything else in KVM.  If the vCPU isn't created successfully,
 it gets deleted and nothing ever sees that state change.
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 164a545..3d5120e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,46 +3,56 @@
  "ref\0YWBdbCNQdikbhhBq@google.com\0"
  "ref\00383b5cacb25e9dc293d891284df9f4cbc06ee3a.camel@wdc.com\0"
  "From\0Sean Christopherson <seanjc@google.com>\0"
- "Subject\0[PATCH v3 5/5] RISC-V: Add SBI HSM extension in KVM\0"
+ "Subject\0Re: [PATCH v3 5/5] RISC-V: Add SBI HSM extension in KVM\0"
  "Date\0Mon, 11 Oct 2021 14:32:38 +0000\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Atish Patra <Atish.Patra@wdc.com>\0"
+ "Cc\0linux-riscv@lists.infradead.org <linux-riscv@lists.infradead.org>"
+  Anup Patel <Anup.Patel@wdc.com>
+  vincent.chen@sifive.com <vincent.chen@sifive.com>
+  kvm-riscv@lists.infradead.org <kvm-riscv@lists.infradead.org>
+  paul.walmsley@sifive.com <paul.walmsley@sifive.com>
+  palmer@dabbelt.com <palmer@dabbelt.com>
+  wangkefeng.wang@huawei.com <wangkefeng.wang@huawei.com>
+  kvm@vger.kernel.org <kvm@vger.kernel.org>
+  pbonzini@redhat.com <pbonzini@redhat.com>
+ " linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "On Mon, Oct 11, 2021, Atish Patra wrote:\n"
  "> On Fri, 2021-10-08 at 15:02 +0000, Sean Christopherson wrote:\n"
  "> > On Thu, Oct 07, 2021, Atish Patra wrote:\n"
- "> > > +???????preempt_disable();\n"
- "> > > +???????loaded = (vcpu->cpu != -1);\n"
- "> > > +???????if (loaded)\n"
- "> > > +???????????????kvm_arch_vcpu_put(vcpu);\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240preempt_disable();\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240loaded = (vcpu->cpu != -1);\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (loaded)\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240kvm_arch_vcpu_put(vcpu);\n"
  "> > \n"
- "> > Oof.? Looks like this pattern was taken from arm64.?\n"
+ "> > Oof.\302\240 Looks like this pattern was taken from arm64.\302\240\n"
  "> \n"
  "> Yes. This part is similar to arm64 because the same race condition can\n"
  "> happen in riscv due to save/restore of CSRs during reset.\n"
  "> \n"
  "> \n"
- "> >  Is there really no better approach to handling this?? I don't see anything\n"
+ "> >  Is there really no better approach to handling this?\302\240 I don't see anything\n"
  "> >  in kvm_riscv_reset_vcpu() that will obviously break if the vCPU is\n"
- "> >  loaded.? If the goal is purely to effect a CSR reset via\n"
+ "> >  loaded.\302\240 If the goal is purely to effect a CSR reset via\n"
  "> >  kvm_arch_vcpu_load(), then why not just factor out a helper to do exactly\n"
  "> >  that?\n"
  "\n"
  "What about the question here?\n"
  "\n"
  "> > \n"
- "> > > ?\n"
- "> > > ????????memcpy(csr, reset_csr, sizeof(*csr));\n"
- "> > > ?\n"
+ "> > > \302\240\n"
+ "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240memcpy(csr, reset_csr, sizeof(*csr));\n"
+ "> > > \302\240\n"
  "> > > @@ -144,6 +151,11 @@ static void kvm_riscv_reset_vcpu(struct\n"
  "> > > kvm_vcpu *vcpu)\n"
- "> > > ?\n"
- "> > > ????????WRITE_ONCE(vcpu->arch.irqs_pending, 0);\n"
- "> > > ????????WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);\n"
+ "> > > \302\240\n"
+ "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240WRITE_ONCE(vcpu->arch.irqs_pending, 0);\n"
+ "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);\n"
  "> > > +\n"
- "> > > +???????/* Reset the guest CSRs for hotplug usecase */\n"
- "> > > +???????if (loaded)\n"
- "> > > +???????????????kvm_arch_vcpu_load(vcpu, smp_processor_id());\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240/* Reset the guest CSRs for hotplug usecase */\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (loaded)\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240kvm_arch_vcpu_load(vcpu, smp_processor_id());\n"
  "> > \n"
  "> > If the preempt shenanigans really have to stay, at least use\n"
  "> > get_cpu()/put_cpu().\n"
@@ -61,23 +71,23 @@
  "It would make the code a bit self-documenting, because AFAICT it doesn't truly\n"
  "care about being preempted, it cares about keeping the vCPU on the correct pCPU.\n"
  "\n"
- "> > > +???????preempt_enable();\n"
- "> > > ?}\n"
- "> > > ?\n"
- "> > > ?int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240preempt_enable();\n"
+ "> > > \302\240}\n"
+ "> > > \302\240\n"
+ "> > > \302\240int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)\n"
  "> > > @@ -180,6 +192,13 @@ int kvm_arch_vcpu_create(struct kvm_vcpu\n"
  "> > > *vcpu)\n"
- "> > > ?\n"
- "> > > ?void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)\n"
- "> > > ?{\n"
- "> > > +???????/**\n"
- "> > > +??????? * vcpu with id 0 is the designated boot cpu.\n"
- "> > > +??????? * Keep all vcpus with non-zero cpu id in power-off state\n"
+ "> > > \302\240\n"
+ "> > > \302\240void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)\n"
+ "> > > \302\240{\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240/**\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240 * vcpu with id 0 is the designated boot cpu.\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240 * Keep all vcpus with non-zero cpu id in power-off state\n"
  "> > > so that they\n"
- "> > > +??????? * can brought to online using SBI HSM extension.\n"
- "> > > +??????? */\n"
- "> > > +???????if (vcpu->vcpu_idx != 0)\n"
- "> > > +???????????????kvm_riscv_vcpu_power_off(vcpu);\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240 * can brought to online using SBI HSM extension.\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240 */\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (vcpu->vcpu_idx != 0)\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240kvm_riscv_vcpu_power_off(vcpu);\n"
  "> > \n"
  "> > Why do this in postcreate?\n"
  "> > \n"
@@ -90,6 +100,11 @@
  "But kvm_riscv_vcpu_power_off() doesn't doesn't anything outside of the vCPU.  It\n"
  "clears vcpu->arch.power_off, makes a request, and kicks the vCPU.  None of that\n"
  "has side effects to anything else in KVM.  If the vCPU isn't created successfully,\n"
- it gets deleted and nothing ever sees that state change.
+ "it gets deleted and nothing ever sees that state change.\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-c7db0956b61e6b13a42f618e5ae4ae407ab89f5d7fffccbd89b6dd1f38788100
+12f14a6bd8f55455d75ed910d1634303fb57ade83ed6cf32bc30fb164f4efacc
