From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: "David Müller (ELSOFT AG)" <d.mueller@elsoft.ch>
Cc: linux-rtc@vger.kernel.org
Subject: Re: rtc-pcf8563: STOP bit usage during time update?
Date: Mon, 25 Oct 2021 12:25:38 +0200 [thread overview]
Message-ID: <YXaGIh3Y5vA66RWc@piout.net> (raw)
In-Reply-To: <43a688c4-f721-ce3f-f6fc-c1065cc12b68@elsoft.ch>
On 25/09/2021 09:00:00+0200, David Müller (ELSOFT AG) wrote:
> According to the example on page 30 of the EPSON datasheet
> https://support.epson.biz/td/api/doc_check.php?dl=app_RTC-8564JE&lang=en
> for the 8564 version of this chip, the time update sequence is as follows:
>
> - set CTRLSTS1[STOP] bit to 1
> - update time registers
> - set CTRLSTS1[STOP] bit to 0
>
> The NXP datasheet is not so explicit regarding STOP bit handling.
>
> Nevertheless I don't see any STOP bit related action in the driver:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/rtc/rtc-pcf8563.c?h=v5.14#n244
>
> Am I overlooking or missing something here?
You are not missing anything, the driver is not stopping the clock while
updating it. The hym8563 driver (which is compatible) does it.
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
prev parent reply other threads:[~2021-10-25 10:25 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-25 7:00 rtc-pcf8563: STOP bit usage during time update? David Müller (ELSOFT AG)
2021-10-25 10:25 ` Alexandre Belloni [this message]
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