Re: [Intel-gfx] [PATCH 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Nov 24, 2021 at 01:06:49AM +0530, Uma Shankar wrote:
> XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
> extended range. It has 511 entries for gamma with additional 2 entries
> for extended range.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f01cba4ec283..40d21a8c50ff 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -938,7 +938,7 @@ static const struct intel_device_info adl_s_info = {
>  
>  #define XE_LPD_FEATURES \
>  	.abox_mask = GENMASK(1, 0),						\
> -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 0 },		\
> +	.color = { .degamma_lut_size = 128, .gamma_lut_size = 513 },		\

Missing .degamma_lut_tests.

Shouldn't .gamma_lut_size be 1024 or did they really change it?

>  	.dbuf.size = 4096,							\
>  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
>  		BIT(DBUF_S4),							\
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel