From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BC7DC433EF for ; Tue, 23 Nov 2021 09:15:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234064AbhKWJSv (ORCPT ); Tue, 23 Nov 2021 04:18:51 -0500 Received: from muru.com ([72.249.23.125]:59266 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230306AbhKWJSv (ORCPT ); Tue, 23 Nov 2021 04:18:51 -0500 Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 7C1DE80F5; Tue, 23 Nov 2021 09:16:21 +0000 (UTC) Date: Tue, 23 Nov 2021 11:15:41 +0200 From: Tony Lindgren To: =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: Linus Walleij , Rob Herring , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Subject: Re: [PATCH 2/5] dt-bindings: pinctrl: brcm,ns-pinmux: extend example Message-ID: References: <20211118132152.15722-1-zajec5@gmail.com> <20211118132152.15722-3-zajec5@gmail.com> <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org * Rafał Miłecki [211123 07:56]: > Does it mean above "reg" usages are all incorrect and binding "reg" in > such way is deprecated? This is something totally new to me, can you > confirm that, please? Here you have a device with multiple control register instances at various register offsets. Using index here makes as much sense as the old interrupt number defines we used to have but got rid of. Please don't use an index to address them. Index makes sense when there is no real offset to use, like a SPI chip select, or a bit offset inside the register like a GPIO instance bit. Regards, Tony From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69F22C433EF for ; Tue, 23 Nov 2021 09:17:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8qAyiLm8Bpc63RWtroJyGQqUkbMy3OnnJTX6SXbdBRU=; b=vORCsUtOWXgvXp MkRCopU+2XfS1OivtOMR7QAWp30auku5azEvmeFwdX4YxhoQuA9sb7V0vOVpYbjn+axGic9JqspIs UKnOA2o1fAT2jfn48QXUfiQDHgGZWFDfb04hal5swT5HBXRPHS/x/+0vt0Ltwqya5LFh8+DKPQVzd CuDMhN4i9H60UpgiJc1UuTD7gb4XqCkabp87FTC2hwA2ouGeSwOj/ip6gNKkvRFI/xl7wzFj8XNTj z1iS89gavTBESrk2ZHkJM9LgjraXYK5ITWdl5eOoIl9O59lxi4BzYnacCvhgEQCM4hrCs73s1UHJr kWXocE8Kzp0UgWsOToew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mpRu1-001SOH-3q; Tue, 23 Nov 2021 09:15:49 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mpRtw-001SN6-5h for linux-arm-kernel@lists.infradead.org; Tue, 23 Nov 2021 09:15:45 +0000 Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 7C1DE80F5; Tue, 23 Nov 2021 09:16:21 +0000 (UTC) Date: Tue, 23 Nov 2021 11:15:41 +0200 From: Tony Lindgren To: =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: Linus Walleij , Rob Herring , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Subject: Re: [PATCH 2/5] dt-bindings: pinctrl: brcm,ns-pinmux: extend example Message-ID: References: <20211118132152.15722-1-zajec5@gmail.com> <20211118132152.15722-3-zajec5@gmail.com> <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211123_011544_290933_0D69014F X-CRM114-Status: UNSURE ( 9.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org KiBSYWZhxYIgTWnFgmVja2kgPHphamVjNUBnbWFpbC5jb20+IFsyMTExMjMgMDc6NTZdOgo+IERv ZXMgaXQgbWVhbiBhYm92ZSAicmVnIiB1c2FnZXMgYXJlIGFsbCBpbmNvcnJlY3QgYW5kIGJpbmRp bmcgInJlZyIgaW4KPiBzdWNoIHdheSBpcyBkZXByZWNhdGVkPyBUaGlzIGlzIHNvbWV0aGluZyB0 b3RhbGx5IG5ldyB0byBtZSwgY2FuIHlvdQo+IGNvbmZpcm0gdGhhdCwgcGxlYXNlPwoKSGVyZSB5 b3UgaGF2ZSBhIGRldmljZSB3aXRoIG11bHRpcGxlIGNvbnRyb2wgcmVnaXN0ZXIgaW5zdGFuY2Vz IGF0CnZhcmlvdXMgcmVnaXN0ZXIgb2Zmc2V0cy4gVXNpbmcgaW5kZXggaGVyZSBtYWtlcyBhcyBt dWNoIHNlbnNlIGFzCnRoZSBvbGQgaW50ZXJydXB0IG51bWJlciBkZWZpbmVzIHdlIHVzZWQgdG8g aGF2ZSBidXQgZ290IHJpZCBvZi4KClBsZWFzZSBkb24ndCB1c2UgYW4gaW5kZXggdG8gYWRkcmVz cyB0aGVtLiBJbmRleCBtYWtlcyBzZW5zZSB3aGVuCnRoZXJlIGlzIG5vIHJlYWwgb2Zmc2V0IHRv IHVzZSwgbGlrZSBhIFNQSSBjaGlwIHNlbGVjdCwgb3IgYSBiaXQKb2Zmc2V0IGluc2lkZSB0aGUg cmVnaXN0ZXIgbGlrZSBhIEdQSU8gaW5zdGFuY2UgYml0LgoKUmVnYXJkcywKClRvbnkKCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJu ZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRw Oi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK