From mboxrd@z Thu Jan 1 00:00:00 1970 From: Johannes Weiner Subject: Re: [PATCH] mm/memcontrol: Disable on PREEMPT_RT Date: Tue, 7 Dec 2021 11:55:38 -0500 Message-ID: References: <20211207155208.eyre5svucpg7krxe@linutronix.de> Mime-Version: 1.0 Return-path: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cmpxchg-org.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=jBIRb58Y6btL+TAXKBtqGWyLSLmb/GcxbXs8B9okoJI=; b=xVie4c8Jj9A8d6UbzG2D4i8Nvmdt8QlQvLgRCKAHD0yC9kTB2O9kIE+hhm7KY3Dm75 ah5bV+hSCiX04qN/2IR96z3IsKqa4ziG2K1mYHVCveyzJZBvuwNBRm3DnF0g3d5emx1Z 2yc9H4rHwU8lLtJs6wHrpSLCv9NY8zhv31ZF3/UhvqukVcCbjKD9+Eoeo50rxWwlVozJ h8uQAdPtl0qp4dmuVcV0ts5oYWQY7wusgeEbP9Y+6rt6pL5B4BHgvtiG5LIUqY31aof3 pY0C8UK3RS5LBPrnCFuA9LMp8pIC4Tue6Jfz+oMmvliC3aAdw7AbunTRstt3Tnl8a1Ul 5juw== Content-Disposition: inline In-Reply-To: <20211207155208.eyre5svucpg7krxe-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> List-ID: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Sebastian Andrzej Siewior Cc: cgroups-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mm-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org, Andrew Morton , Michal Hocko , Thomas Gleixner , Vladimir Davydov , Waiman Long On Tue, Dec 07, 2021 at 04:52:08PM +0100, Sebastian Andrzej Siewior wrote: > From: Thomas Gleixner > > MEMCG has a few constructs which are not compatible with PREEMPT_RT's > requirements. This includes: > - relying on disabled interrupts from spin_lock_irqsave() locking for > something not related to lock itself (like the per-CPU counter). If memory serves me right, this is the VM_BUG_ON() in workingset.c: VM_WARN_ON_ONCE(!irqs_disabled()); /* For __inc_lruvec_page_state */ This isn't memcg specific. This is the serialization model of the generic MM page counters. They can be updated from process and irq context, and need to avoid preemption (and corruption) during RMW. !CONFIG_MEMCG: static inline void mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val) { struct page *page = virt_to_head_page(p); mod_node_page_state(page_pgdat(page), idx, val); } which does: void mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, long delta) { unsigned long flags; local_irq_save(flags); __mod_node_page_state(pgdat, item, delta); local_irq_restore(flags); } If this breaks PREEMPT_RT, it's broken without memcg too. > - explicitly disabling interrupts and acquiring a spinlock_t based lock > like in memcg_check_events() -> eventfd_signal(). Similar problem to the above: we disable interrupts to protect RMW sequences that can (on non-preemptrt) be initiated through process context as well as irq context. IIUC, the PREEMPT_RT construct for handling exactly that scenario is the "local lock". Is that correct? It appears Ingo has already fixed the LRU cache, which for non-rt also relies on irq disabling: commit b01b2141999936ac3e4746b7f76c0f204ae4b445 Author: Ingo Molnar Date: Wed May 27 22:11:15 2020 +0200 mm/swap: Use local_lock for protection The memcg charge cache should be fixable the same way. Likewise, if you fix the generic vmstat counters like this, the memcg implementation can follow suit. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B11EAC433EF for ; Tue, 7 Dec 2021 16:56:02 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 2E9D66B00A0; Tue, 7 Dec 2021 11:55:52 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 297E46B00A5; Tue, 7 Dec 2021 11:55:52 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 160B36B00AF; Tue, 7 Dec 2021 11:55:52 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0149.hostedemail.com [216.40.44.149]) by kanga.kvack.org (Postfix) with ESMTP id 0959C6B00A0 for ; Tue, 7 Dec 2021 11:55:52 -0500 (EST) Received: from smtpin24.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id B071E8249980 for ; Tue, 7 Dec 2021 16:55:41 +0000 (UTC) X-FDA: 78891599682.24.C736E71 Received: from mail-qt1-f175.google.com (mail-qt1-f175.google.com [209.85.160.175]) by imf04.hostedemail.com (Postfix) with ESMTP id 36F6240007 for ; Tue, 7 Dec 2021 16:55:41 +0000 (UTC) Received: by mail-qt1-f175.google.com with SMTP id q14so14868741qtx.10 for ; Tue, 07 Dec 2021 08:55:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cmpxchg-org.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=jBIRb58Y6btL+TAXKBtqGWyLSLmb/GcxbXs8B9okoJI=; b=xVie4c8Jj9A8d6UbzG2D4i8Nvmdt8QlQvLgRCKAHD0yC9kTB2O9kIE+hhm7KY3Dm75 ah5bV+hSCiX04qN/2IR96z3IsKqa4ziG2K1mYHVCveyzJZBvuwNBRm3DnF0g3d5emx1Z 2yc9H4rHwU8lLtJs6wHrpSLCv9NY8zhv31ZF3/UhvqukVcCbjKD9+Eoeo50rxWwlVozJ h8uQAdPtl0qp4dmuVcV0ts5oYWQY7wusgeEbP9Y+6rt6pL5B4BHgvtiG5LIUqY31aof3 pY0C8UK3RS5LBPrnCFuA9LMp8pIC4Tue6Jfz+oMmvliC3aAdw7AbunTRstt3Tnl8a1Ul 5juw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=jBIRb58Y6btL+TAXKBtqGWyLSLmb/GcxbXs8B9okoJI=; b=pIH4cN5LBIDHcNNFaXNVO2IWZLhXUKUbGW1OBCdcM/ETSkOslDlazP5ToIyREha3H/ hUrWwUtpd1/86nf4j2AaIrEVwNXw/waqvRmn/eTKrixW9itVaJdLNlT0bmj8Q+PBmI1T 3a0iDbW525O1lVDKkXwCSiJxbA2aJNG5afDju6HdMFnf20g1QSd1BCCvQe4oG/f0kB+F AEF3EVXCPVkVD5IfKlFHi3ZmjO8cdC2MjmWDjhAPu1cP5NAKJX/sLzaoW7GaXiacRPYD 7CwhZ+wZcym/H+ByzuwCiyqcYpL+kbE5KZrLj1dPq/0G99vyuvI2dd1GzwG3A7jyMCkp 3AJQ== X-Gm-Message-State: AOAM5316CXn0QGGlZvXMrxvxUTrtKmDZD8JTq/+PrFs2eLlF+w3tyH5/ d6vQHbL3xmuc/qfLwpz8tZoUiw== X-Google-Smtp-Source: ABdhPJy/3i1cZVARjSv2TVIsxsNN6teXBPNEZfAggRQROn5PaiSaIIl1mvr1Y0ltWE/bELIg+HhFpw== X-Received: by 2002:a05:622a:43:: with SMTP id y3mr446251qtw.192.1638896140469; Tue, 07 Dec 2021 08:55:40 -0800 (PST) Received: from localhost ([2620:10d:c091:480::1:6bda]) by smtp.gmail.com with ESMTPSA id t9sm70832qkp.110.2021.12.07.08.55.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 08:55:39 -0800 (PST) Date: Tue, 7 Dec 2021 11:55:38 -0500 From: Johannes Weiner To: Sebastian Andrzej Siewior Cc: cgroups@vger.kernel.org, linux-mm@kvack.org, Andrew Morton , Michal Hocko , Thomas Gleixner , Vladimir Davydov , Waiman Long Subject: Re: [PATCH] mm/memcontrol: Disable on PREEMPT_RT Message-ID: References: <20211207155208.eyre5svucpg7krxe@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211207155208.eyre5svucpg7krxe@linutronix.de> X-Rspamd-Queue-Id: 36F6240007 Authentication-Results: imf04.hostedemail.com; dkim=pass header.d=cmpxchg-org.20210112.gappssmtp.com header.s=20210112 header.b=xVie4c8J; spf=pass (imf04.hostedemail.com: domain of hannes@cmpxchg.org designates 209.85.160.175 as permitted sender) smtp.mailfrom=hannes@cmpxchg.org; dmarc=pass (policy=none) header.from=cmpxchg.org X-Rspamd-Server: rspam04 X-Stat-Signature: kp8xq4g3eyqdnufoexa3gjhf9pa4ai5m X-HE-Tag: 1638896141-942074 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, Dec 07, 2021 at 04:52:08PM +0100, Sebastian Andrzej Siewior wrote: > From: Thomas Gleixner > > MEMCG has a few constructs which are not compatible with PREEMPT_RT's > requirements. This includes: > - relying on disabled interrupts from spin_lock_irqsave() locking for > something not related to lock itself (like the per-CPU counter). If memory serves me right, this is the VM_BUG_ON() in workingset.c: VM_WARN_ON_ONCE(!irqs_disabled()); /* For __inc_lruvec_page_state */ This isn't memcg specific. This is the serialization model of the generic MM page counters. They can be updated from process and irq context, and need to avoid preemption (and corruption) during RMW. !CONFIG_MEMCG: static inline void mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val) { struct page *page = virt_to_head_page(p); mod_node_page_state(page_pgdat(page), idx, val); } which does: void mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, long delta) { unsigned long flags; local_irq_save(flags); __mod_node_page_state(pgdat, item, delta); local_irq_restore(flags); } If this breaks PREEMPT_RT, it's broken without memcg too. > - explicitly disabling interrupts and acquiring a spinlock_t based lock > like in memcg_check_events() -> eventfd_signal(). Similar problem to the above: we disable interrupts to protect RMW sequences that can (on non-preemptrt) be initiated through process context as well as irq context. IIUC, the PREEMPT_RT construct for handling exactly that scenario is the "local lock". Is that correct? It appears Ingo has already fixed the LRU cache, which for non-rt also relies on irq disabling: commit b01b2141999936ac3e4746b7f76c0f204ae4b445 Author: Ingo Molnar Date: Wed May 27 22:11:15 2020 +0200 mm/swap: Use local_lock for protection The memcg charge cache should be fixable the same way. Likewise, if you fix the generic vmstat counters like this, the memcg implementation can follow suit.