From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33FB4C433F5 for ; Mon, 13 Dec 2021 13:26:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WyIN0TzCVObdg91kZ/8AO2G6M39ZFx4vvjIk6i9nytg=; b=Q3k5vUiza3mvjB hkxfnqWQwqKORR4O75X7+Iv4MV7XZ3cLiM0TnaWQfprLFrOxmYXFu+byciNDD19Ra+0zC8CmxYzEl FNEBwVOiZArRBmoflIsfm7+qr/LgPcfZbVN4hTDI9EgXXFKmCNuNi8iJHgyJYymMdq8mlx8pphDsm wDXiICuoE7H1zrEojJIBmc3btU64BGsU/5OWVe/2+HJK24s3Nzc4E7DqjxISYLmWbU1anJN73/SVc jMiiDgrqdwWV0HwvQ3OLaXVsapMtEcBlF6KKwZ6fNsVBMeptG728c97dSFClisVjb+IyOHuT576eD yrxOf0MUmCS8RN6KySpA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwlKF-009fQj-Ab; Mon, 13 Dec 2021 13:25:07 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwlKA-009fPo-MD for linux-arm-kernel@lists.infradead.org; Mon, 13 Dec 2021 13:25:04 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5C958B80ED5; Mon, 13 Dec 2021 13:25:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1BB1FC34601; Mon, 13 Dec 2021 13:24:58 +0000 (UTC) Date: Mon, 13 Dec 2021 13:24:55 +0000 From: Catalin Marinas To: Ard Biesheuvel Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, Mark Rutland , Peter Zijlstra Subject: Re: [PATCH 2/2] arm64/xor: use EOR3 instructions when available Message-ID: References: <20211109120336.3561463-1-ardb@kernel.org> <20211109120336.3561463-3-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211109120336.3561463-3-ardb@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211213_052503_035373_5A23459D X-CRM114-Status: GOOD ( 20.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ard, I trust you on the algorithm but some minor issues below. On Tue, Nov 09, 2021 at 01:03:36PM +0100, Ard Biesheuvel wrote: > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 6f2d3e31fb54..14354acba5b4 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -2034,6 +2034,9 @@ config SYSVIPC_COMPAT > def_bool y > depends on COMPAT && SYSVIPC > > +config CC_HAVE_SHA3 > + def_bool $(cc-option, -march=armv8.2-a+sha3) Is it the compiler or the assembler that we need to support this? I think it's sufficient to only check the latter. I'd also move it to the ARMv8.2 section. > + > menu "Power management options" > > source "kernel/power/Kconfig" > diff --git a/arch/arm64/lib/xor-neon.c b/arch/arm64/lib/xor-neon.c > index ee4795f3e166..0415cb94c781 100644 > --- a/arch/arm64/lib/xor-neon.c > +++ b/arch/arm64/lib/xor-neon.c > @@ -172,6 +172,135 @@ void xor_arm64_neon_5(unsigned long bytes, unsigned long *p1, > } > EXPORT_SYMBOL(xor_arm64_neon_5); > > +static inline uint64x2_t eor3(uint64x2_t p, uint64x2_t q, uint64x2_t r) > +{ > + uint64x2_t res; > + > + asm(".arch armv8.2-a+sha3 \n" > + "eor3 %0.16b, %1.16b, %2.16b, %3.16b" > + : "=w"(res) : "w"(p), "w"(q), "w"(r)); > + return res; > +} The .arch here may confuse the compiler/assembler since it overrides any other .arch. I think this diff on top would do but I haven't extensively tested it. I can fold it in if you give it a try: diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5adae54c98d8..c5104e8829e5 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1545,6 +1545,12 @@ endmenu menu "ARMv8.2 architectural features" +config AS_HAS_ARMV8_2 + def_bool $(cc-option,-Wa$(comma)-march=armv8.2-a) + +config AS_HAS_SHA3 + def_bool $(as-instr,.arch armv8.2-a+sha3) + config ARM64_PMEM bool "Enable support for persistent memory" select ARCH_HAS_PMEM_API @@ -2032,9 +2038,6 @@ config SYSVIPC_COMPAT def_bool y depends on COMPAT && SYSVIPC -config CC_HAVE_SHA3 - def_bool $(cc-option, -march=armv8.2-a+sha3) - menu "Power management options" source "kernel/power/Kconfig" diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile index e8cfc5868aa8..2f1de88651e6 100644 --- a/arch/arm64/Makefile +++ b/arch/arm64/Makefile @@ -58,6 +58,11 @@ stack_protector_prepare: prepare0 include/generated/asm-offsets.h)) endif +ifeq ($(CONFIG_AS_HAS_ARMV8_2), y) +# make sure to pass the newest target architecture to -march. +asm-arch := armv8.2-a +endif + # Ensure that if the compiler supports branch protection we default it # off, this will be overridden if we are using branch protection. branch-prot-flags-y += $(call cc-option,-mbranch-protection=none) diff --git a/arch/arm64/lib/xor-neon.c b/arch/arm64/lib/xor-neon.c index 0415cb94c781..2ca823825363 100644 --- a/arch/arm64/lib/xor-neon.c +++ b/arch/arm64/lib/xor-neon.c @@ -176,7 +176,7 @@ static inline uint64x2_t eor3(uint64x2_t p, uint64x2_t q, uint64x2_t r) { uint64x2_t res; - asm(".arch armv8.2-a+sha3 \n" + asm(ARM64_ASM_PREAMBLE ".arch_extension sha3\n" "eor3 %0.16b, %1.16b, %2.16b, %3.16b" : "=w"(res) : "w"(p), "w"(q), "w"(r)); return res; @@ -311,7 +311,7 @@ EXPORT_STATIC_CALL(xor_arm64_5); static int __init xor_neon_init(void) { - if (IS_ENABLED(CONFIG_CC_HAVE_SHA3) && cpu_have_named_feature(SHA3)) { + if (IS_ENABLED(CONFIG_AS_HAS_SHA3) && cpu_have_named_feature(SHA3)) { static_call_update(xor_arm64_3, xor_arm64_eor3_3); static_call_update(xor_arm64_4, xor_arm64_eor3_4); static_call_update(xor_arm64_5, xor_arm64_eor3_5); -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel