From: Thierry Reding <thierry.reding@gmail.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Jon Hunter <jonathanh@nvidia.com>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v2 2/6] dt-bindings: memory: tegra: Add Tegra234 support
Date: Mon, 13 Dec 2021 17:21:46 +0100 [thread overview]
Message-ID: <YbdzGppDm6H1UNLQ@orome> (raw)
In-Reply-To: <ffb00485-ad21-a11a-03ea-3856e2212563@canonical.com>
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On Sun, Dec 12, 2021 at 07:46:06PM +0100, Krzysztof Kozlowski wrote:
> On 10/12/2021 17:47, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >
> > Document the variant of the memory controller and external memory
> > controllers found on Tegra234 and add some memory client and SMMU
> > stream ID definitions for use in device tree files.
> >
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v2:
> > - conditionally set minItems for reg properties
> >
> > .../nvidia,tegra186-mc.yaml | 20 ++++++++++++
> > include/dt-bindings/clock/tegra234-clock.h | 9 ++++++
> > include/dt-bindings/memory/tegra234-mc.h | 32 +++++++++++++++++++
> > 3 files changed, 61 insertions(+)
> > create mode 100644 include/dt-bindings/memory/tegra234-mc.h
> >
>
> (...)
>
> > /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
> > diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
> > new file mode 100644
> > index 000000000000..2662f70c15c6
> > --- /dev/null
> > +++ b/include/dt-bindings/memory/tegra234-mc.h
> > @@ -0,0 +1,32 @@
> > +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> > +
> > +#ifndef DT_BINDINGS_MEMORY_TEGRA234_MC_H
> > +#define DT_BINDINGS_MEMORY_TEGRA234_MC_H
> > +
> > +/* special clients */
> > +#define TEGRA234_SID_INVALID 0x00
> > +#define TEGRA234_SID_PASSTHROUGH 0x7f
> > +
> > +
> > +/* NISO1 stream IDs */
> > +#define TEGRA234_SID_SDMMC4 0x02
> > +#define TEGRA234_SID_BPMP 0x10
> > +
> > +/*
> > + * memory client IDs
> > + */
> > +
> > +/* sdmmcd memory read client */
> > +#define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63
> > +/* sdmmcd memory write client */
> > +#define TEGRA234_MEMORY_CLIENT_SDMMCWAB 0x67
> > +/* BPMP read client */
> > +#define TEGRA234_MEMORY_CLIENT_BPMPR 0x93
> > +/* BPMP write client */
> > +#define TEGRA234_MEMORY_CLIENT_BPMPW 0x94
> > +/* BPMPDMA read client */
> > +#define TEGRA234_MEMORY_CLIENT_BPMPDMAR 0x95
> > +/* BPMPDMA write client */
> > +#define TEGRA234_MEMORY_CLIENT_BPMPDMAW 0x96
> > +
>
> This header is needed by the driver and DTS patches. One of us can apply
> it and provide to the other via stable-tag. I think Arnd and Olof prefer
> if headers are coming with DTS and are provided to other trees, so maybe
> you will take the bindings and provide a tag for me for the driver?
Yeah, once you're happy with the series (I've just sent out an updated
v3) I can apply this to the Tegra tree and send you a stable tag to pull
into your tree.
Thierry
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next prev parent reply other threads:[~2021-12-13 16:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 16:47 [PATCH v2 0/6] memory: tegra: Add Tegra234 support Thierry Reding
2021-12-10 16:47 ` [PATCH v2 1/6] dt-bindings: memory: tegra: Document #interconnect-cells property Thierry Reding
2021-12-12 18:50 ` Krzysztof Kozlowski
2021-12-13 16:18 ` Thierry Reding
2021-12-10 16:47 ` [PATCH v2 2/6] dt-bindings: memory: tegra: Add Tegra234 support Thierry Reding
2021-12-12 18:46 ` Krzysztof Kozlowski
2021-12-13 16:21 ` Thierry Reding [this message]
2021-12-10 16:47 ` [PATCH v2 3/6] " Thierry Reding
2021-12-10 16:47 ` [PATCH v2 4/6] arm64: tegra: Add EMC general interrupt on Tegra194 Thierry Reding
2021-12-10 16:47 ` [PATCH v2 5/6] arm64: tegra: Add memory controller on Tegra234 Thierry Reding
2021-12-10 16:47 ` [PATCH v2 6/6] arm64: tegra: Hook up MMC and BPMP to memory controller Thierry Reding
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