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From: Greg KH <gregkh@linuxfoundation.org>
To: Hammer Hsieh <hammerh0314@gmail.com>
Cc: robh+dt@kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	jirislaby@kernel.org, p.zabel@pengutronix.de,
	wells.lu@sunplus.com, Hammer Hsieh <hammer.hsieh@sunplus.com>
Subject: Re: [PATCH v5 2/2] serial:sunplus-uart:Add Sunplus SoC UART Driver
Date: Mon, 20 Dec 2021 16:51:04 +0100	[thread overview]
Message-ID: <YcCmaJkeKy+R0mhF@kroah.com> (raw)
In-Reply-To: <1639379407-28607-3-git-send-email-hammer.hsieh@sunplus.com>

On Mon, Dec 13, 2021 at 03:10:07PM +0800, Hammer Hsieh wrote:
> +/* Register offsets */
> +#define SUP_UART_DATA			0x00
> +#define SUP_UART_LSR			0x04
> +#define SUP_UART_MSR			0x08
> +#define SUP_UART_LCR			0x0C
> +#define SUP_UART_MCR			0x10
> +#define SUP_UART_DIV_L			0x14
> +#define SUP_UART_DIV_H			0x18
> +#define SUP_UART_ISC			0x1C
> +#define SUP_UART_TX_RESIDUE		0x20
> +#define SUP_UART_RX_RESIDUE		0x24
> +
> +/* Line Status Register bits */
> +#define SUP_UART_LSR_TXE		BIT(6) /* tx empty */
> +#define SUP_UART_LSR_BC			BIT(5) /* break condition status */
> +#define SUP_UART_LSR_FE			BIT(4) /* frame error status */
> +#define SUP_UART_LSR_OE			BIT(3) /* overrun error status */
> +#define SUP_UART_LSR_PE			BIT(2) /* parity error status */
> +#define SUP_UART_LSR_RX			BIT(1) /* 1: receive fifo not empty */
> +#define SUP_UART_LSR_TX			BIT(0) /* 1: transmit fifo is not full */
> +#define SUP_UART_LSR_TX_NOT_FULL	1
> +#define SUP_UART_LSR_BRK_ERROR_BITS	GENMASK(5, 2)
> +
> +/* Line Control Register bits */
> +#define SUP_UART_LCR_BC			BIT(5) /* break condition select */
> +#define SUP_UART_LCR_PR			BIT(4) /* parity bit polarity select */
> +#define SUP_UART_LCR_PE			BIT(3) /* parity bit enable */
> +#define SUP_UART_LCR_ST			BIT(2) /* stop bits select */
> +#define SUP_UART_LCR_WL5		0x00 /*  word length 5 */
> +#define SUP_UART_LCR_WL6		0x01 /*  word length 6 */
> +#define SUP_UART_LCR_WL7		0x02 /*  word length 7 */
> +#define SUP_UART_LCR_WL8		0x03 /*  word length 8 (default) */
> +
> +/* Modem Control Register bits */
> +#define SUP_UART_MCR_LB			BIT(4) /* Loopback mode */
> +#define SUP_UART_MCR_RI			BIT(3) /* ring indicator */
> +#define SUP_UART_MCR_DCD		BIT(2) /* data carrier detect */
> +#define SUP_UART_MCR_RTS		BIT(1) /* request to send */
> +#define SUP_UART_MCR_DTS		BIT(0) /* data terminal ready */
> +
> +/* Interrupt Status/Control Register bits */
> +#define SUP_UART_ISC_RXM		BIT(5) /* RX interrupt enable */
> +#define SUP_UART_ISC_TXM		BIT(4) /* TX interrupt enable */
> +#define SUP_UART_ISC_RX			BIT(1) /* RX interrupt status */
> +#define SUP_UART_ISC_TX			BIT(0) /* TX interrupt status */
> +
> +#define SUP_DUMMY_READ			BIT(16) /* drop bytes received on a !CREAD port */
> +#define SUP_UART_NR			5

Aren't most of these defines already in the kernel header files?  Why
create them again?


  parent reply	other threads:[~2021-12-20 15:51 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-13  7:10 [PATCH v5 0/2] Add UART driver for Suplus SP7021 SoC Hammer Hsieh
2021-12-13  7:10 ` [PATCH v5 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver Hammer Hsieh
2021-12-13 17:26   ` Rob Herring
2021-12-13  7:10 ` [PATCH v5 2/2] serial:sunplus-uart:Add " Hammer Hsieh
2021-12-13  7:47   ` Jiri Slaby
2021-12-13 11:37     ` Hammer Hsieh 謝宏孟
2021-12-20 15:47   ` Greg KH
2021-12-20 15:49   ` Greg KH
2021-12-20 15:51   ` Greg KH [this message]
2021-12-21  8:14     ` hammer hsieh
2021-12-21  8:21       ` Greg KH
2021-12-24  7:16         ` hammer hsieh
2021-12-24  8:59           ` Greg KH
2021-12-24  9:05             ` hammer hsieh
2021-12-24  9:21               ` hammer hsieh
2021-12-30 12:18                 ` Greg KH

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