From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions
Date: Wed, 12 Jan 2022 16:41:43 -0500 [thread overview]
Message-ID: <Yd9LFygL5q43ziNW@intel.com> (raw)
In-Reply-To: <20220111051600.3429104-1-matthew.d.roper@intel.com>
On Mon, Jan 10, 2022 at 09:15:49PM -0800, Matt Roper wrote:
> Let's start splitting up and cleaning up parts of i915_reg.h. Rather
> than starting with dead code removal as we did in v1, this time we'll
> switch a few macros to parameterized style, and then move a few types of
> registers (engine registers, SNPS PHY registers) off to their own header
> files.
>
> v3:
> - Split out i915_reg_defs.h in its own patch
> - Also split out combo PHY and MG/DKL PHY sets of registers
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Matt Roper (11):
> drm/i915: Use parameterized GPR register definitions everywhere
> drm/i915: Parameterize PWRCTX_MAXCNT
> drm/i915: Parameterize ECOSKPD
> drm/i915: Use RING_PSMI_CTL rather than per-engine macros
> drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7
> drm/i915: Introduce i915_reg_defs.h
> drm/i915/gt: Move engine registers to their own header
> drm/i915: Move SNPS PHY registers to their own header
> drm/i915: Move combo PHY registers to their own header
> drm/i915: Move TC PHY registers to their own header
> drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsets
>
> drivers/gpu/drm/i915/display/icl_dsi.c | 1 +
> .../gpu/drm/i915/display/intel_combo_phy.c | 1 +
> .../drm/i915/display/intel_combo_phy_regs.h | 162 ++++
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +
> .../drm/i915/display/intel_display_power.c | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 1 +
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 +
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 1 +
> .../drm/i915/display/intel_snps_phy_regs.h | 75 ++
> drivers/gpu/drm/i915/display/intel_tc.c | 1 +
> .../gpu/drm/i915/display/intel_tc_phy_regs.h | 280 ++++++
> drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/gen6_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 1 +
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/intel_engine_regs.h | 197 ++++
> .../drm/i915/gt/intel_execlists_submission.c | 1 +
> drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
> drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
> drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 15 -
> drivers/gpu/drm/i915/gt/intel_rc6.c | 9 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 1 +
> drivers/gpu/drm/i915/gt/intel_ring.c | 1 +
> .../gpu/drm/i915/gt/intel_ring_submission.c | 11 +-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +-
> drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_rps.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_timeline.c | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 +
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 +-
> drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
> drivers/gpu/drm/i915/gvt/handlers.c | 4 +-
> drivers/gpu/drm/i915/gvt/mmio_context.c | 5 +-
> drivers/gpu/drm/i915/gvt/mmio_context.h | 1 +
> drivers/gpu/drm/i915/i915_cmd_parser.c | 69 +-
> drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
> drivers/gpu/drm/i915/i915_perf.c | 1 +
> drivers/gpu/drm/i915/i915_pmu.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 841 +-----------------
> drivers/gpu/drm/i915/i915_reg_defs.h | 98 ++
> drivers/gpu/drm/i915/i915_request.c | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 11 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 44 files changed, 911 insertions(+), 907 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
> create mode 100644 drivers/gpu/drm/i915/display/intel_snps_phy_regs.h
> create mode 100644 drivers/gpu/drm/i915/display/intel_tc_phy_regs.h
> create mode 100644 drivers/gpu/drm/i915/gt/intel_engine_regs.h
> create mode 100644 drivers/gpu/drm/i915/i915_reg_defs.h
I understand that I'm late to the fun here, but I got myself wondering if
we couldn't separated the registers in a "regs" directory
and find some way to organize them in IP blocks matching the hw...
mainly thinking about 2 cases:
1. searching for registers usages...
2. the idea of having some sort of auto generation from spec...
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-01-12 21:41 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 5:15 [Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 01/11] drm/i915: Use parameterized GPR register definitions everywhere Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 02/11] drm/i915: Parameterize PWRCTX_MAXCNT Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 03/11] drm/i915: Parameterize ECOSKPD Matt Roper
2022-01-12 15:09 ` Ville Syrjälä
2022-01-13 4:14 ` Matt Roper
2022-01-13 9:06 ` Jani Nikula
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 04/11] drm/i915: Use RING_PSMI_CTL rather than per-engine macros Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 05/11] drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7 Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 06/11] drm/i915: Introduce i915_reg_defs.h Matt Roper
2022-01-11 8:42 ` Jani Nikula
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 07/11] drm/i915/gt: Move engine registers to their own header Matt Roper
2022-01-11 16:29 ` Lucas De Marchi
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 08/11] drm/i915: Move SNPS PHY " Matt Roper
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 09/11] drm/i915: Move combo " Matt Roper
2022-01-11 13:44 ` Jani Nikula
2022-01-11 5:15 ` [Intel-gfx] [PATCH v3 10/11] drm/i915: Move TC " Matt Roper
2022-01-11 13:49 ` Jani Nikula
2022-01-11 5:16 ` [Intel-gfx] [PATCH v3 11/11] drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsets Matt Roper
2022-01-11 13:50 ` Jani Nikula
2022-01-11 5:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Start cleaning up register definitions (rev3) Patchwork
2022-01-11 5:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-11 6:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-11 10:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-01-11 22:17 ` Matt Roper
2022-01-11 22:19 ` Matt Roper
2022-01-12 21:41 ` Rodrigo Vivi [this message]
2022-01-13 16:58 ` [Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions Jani Nikula
2022-01-13 20:23 ` Rodrigo Vivi
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