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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id t5sm12971739pfl.6.2022.01.18.10.30.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 10:30:07 -0800 (PST) Date: Tue, 18 Jan 2022 18:30:03 +0000 From: Sean Christopherson To: Like Xu Cc: Paolo Bonzini , Wanpeng Li , Jim Mattson , Vitaly Kuznetsov , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] KVM: x86: Update the states size cpuid even if XCR0/IA32_XSS is reset Message-ID: References: <20220117082631.86143-1-likexu@tencent.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220117082631.86143-1-likexu@tencent.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Mon, Jan 17, 2022, Like Xu wrote: > From: Like Xu > > XCR0 is reset to 1 by RESET but not INIT and IA32_XSS is zeroed by > both RESET and INIT. In both cases, the size in bytes of the XSAVE > area containing all states enabled by XCR0 or (XCRO | IA32_XSS) > needs to be updated. > > Fixes: a554d207dc46 ("KVM: X86: Processor States following Reset or INIT") > Signed-off-by: Like Xu > --- > arch/x86/kvm/x86.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 76b4803dd3bd..5748a57e1cb7 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -11134,6 +11134,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > struct kvm_cpuid_entry2 *cpuid_0x1; > unsigned long old_cr0 = kvm_read_cr0(vcpu); > unsigned long new_cr0; > + bool need_update_cpuid = false; > > /* > * Several of the "set" flows, e.g. ->set_cr0(), read other registers > @@ -11199,6 +11200,8 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > > vcpu->arch.msr_misc_features_enables = 0; > > + if (vcpu->arch.xcr0 != XFEATURE_MASK_FP) > + need_update_cpuid = true; > vcpu->arch.xcr0 = XFEATURE_MASK_FP; > } > > @@ -11216,6 +11219,8 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0); > kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600); > > + if (vcpu->arch.ia32_xss) > + need_update_cpuid = true; This means that kvm_set_msr_common()'s handling of MSR_IA32_XSS also needs to update kvm_update_cpuid_runtime(). And then for bnoth XCR0 and XSS, I would very strongly prefer that use the helpers to write the values and let the helpers call kvm_update_cpuid_runtime(). Yes, that will mean kvm_update_cpuid_runtime() may be called multiple times during INIT, but that's already true (CR4), and this isn't exactly a fast path. diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 55518b7d3b96..22d4b1d15e94 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -11256,7 +11256,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) vcpu->arch.msr_misc_features_enables = 0; - vcpu->arch.xcr0 = XFEATURE_MASK_FP; + __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP); } /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */ @@ -11273,7 +11273,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0); kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600); - vcpu->arch.ia32_xss = 0; + __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true); static_call(kvm_x86_vcpu_reset)(vcpu, init_event);