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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id l13sm5532829pgs.16.2022.01.21.07.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 07:41:57 -0800 (PST) Date: Fri, 21 Jan 2022 15:41:53 +0000 From: Sean Christopherson To: Like Xu Cc: Paolo Bonzini , Wanpeng Li , Jim Mattson , Vitaly Kuznetsov , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] KVM: x86: Sync the states size with the XCR0/IA32_XSS at any time Message-ID: References: <20220117082631.86143-1-likexu@tencent.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Jan 21, 2022, Like Xu wrote: > From: Like Xu > > XCR0 is reset to 1 by RESET but not INIT and IA32_XSS is zeroed by > both RESET and INIT. The kvm_set_msr_common()'s handling of MSR_IA32_XSS > also needs to update kvm_update_cpuid_runtime(). In the above cases, the > size in bytes of the XSAVE area containing all states enabled by XCR0 or > (XCRO | IA32_XSS) needs to be updated. > > For simplicity and consistency, legacy helpers are used to write values s/legacy/existing "legacy" refers to something that is outdated/deprecated, which isn't what you intend here. > and call kvm_update_cpuid_runtime(), and it's not exactly a fast path. > > Fixes: a554d207dc46 ("KVM: X86: Processor States following Reset or INIT") > Signed-off-by: Like Xu > --- > v1 -> v2 Changelog: > - Strongly prefer that use the helpers to write the values; (Sean) > - Postpone IA32_XSS test cases once non-zero values are supported; (Paolo) > - User space may call SET_CPUID2 after kvm_vcpu_reset(init_event=false); (Paolo) > > arch/x86/kvm/x86.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 55518b7d3b96..22d4b1d15e94 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -11256,7 +11256,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > > vcpu->arch.msr_misc_features_enables = 0; > > - vcpu->arch.xcr0 = XFEATURE_MASK_FP; > + __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP); > } > > /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */ > @@ -11273,7 +11273,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0); > kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600); > > - vcpu->arch.ia32_xss = 0; > + __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true); This relies on a prep patch to invoke kvm_update_cpuid_runtime() in kvm_set_msr_common() for MSR_IA32_XSS, no? > static_call(kvm_x86_vcpu_reset)(vcpu, init_event); > > -- > 2.33.1 > >