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[82.30.61.225]) by smtp.gmail.com with ESMTPSA id u19sm152222wmm.39.2022.01.26.12.07.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jan 2022 12:07:38 -0800 (PST) Date: Wed, 26 Jan 2022 20:07:36 +0000 From: "Dr. David Alan Gilbert" To: Stefan Hajnoczi Subject: Re: [PATCH v5 03/18] pci: isolated address space for PCI bus Message-ID: References: <2971c1bec04acaac4eb3c1f2b104cbeabad01e22.1642626515.git.jag.raman@oracle.com> <20220119190742-mutt-send-email-mst@kernel.org> <1CACFB08-1BBC-4ECC-9C0B-6F377018D795@oracle.com> MIME-Version: 1.0 In-Reply-To: User-Agent: Mutt/2.1.5 (2021-12-30) Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=dgilbert@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=dgilbert@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.155, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "eduardo@habkost.net" , Elena Ufimtseva , John Johnson , Jag Raman , Beraldo Leal , "Michael S. Tsirkin" , "armbru@redhat.com" , "quintela@redhat.com" , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , qemu-devel , =?iso-8859-1?Q?Marc-Andr=E9?= Lureau , Daniel =?iso-8859-1?Q?P=2E_Berrang=E9?= , "thanos.makatos@nutanix.com" , Paolo Bonzini , Eric Blake , "john.levon@nutanix.com" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" * Stefan Hajnoczi (stefanha@redhat.com) wrote: > On Wed, Jan 26, 2022 at 05:27:32AM +0000, Jag Raman wrote: > > > > > > > On Jan 25, 2022, at 1:38 PM, Dr. David Alan Gilbert wrote: > > > > > > * Jag Raman (jag.raman@oracle.com) wrote: > > >> > > >> > > >>> On Jan 19, 2022, at 7:12 PM, Michael S. Tsirkin wrote: > > >>> > > >>> On Wed, Jan 19, 2022 at 04:41:52PM -0500, Jagannathan Raman wrote: > > >>>> Allow PCI buses to be part of isolated CPU address spaces. This has a > > >>>> niche usage. > > >>>> > > >>>> TYPE_REMOTE_MACHINE allows multiple VMs to house their PCI devices in > > >>>> the same machine/server. This would cause address space collision as > > >>>> well as be a security vulnerability. Having separate address spaces for > > >>>> each PCI bus would solve this problem. > > >>> > > >>> Fascinating, but I am not sure I understand. any examples? > > >> > > >> Hi Michael! > > >> > > >> multiprocess QEMU and vfio-user implement a client-server model to allow > > >> out-of-process emulation of devices. The client QEMU, which makes ioctls > > >> to the kernel and runs VCPUs, could attach devices running in a server > > >> QEMU. The server QEMU needs access to parts of the client’s RAM to > > >> perform DMA. > > > > > > Do you ever have the opposite problem? i.e. when an emulated PCI device > > > > That’s an interesting question. > > > > > exposes a chunk of RAM-like space (frame buffer, or maybe a mapped file) > > > that the client can see. What happens if two emulated devices need to > > > access each others emulated address space? > > > > In this case, the kernel driver would map the destination’s chunk of internal RAM into > > the DMA space of the source device. Then the source device could write to that > > mapped address range, and the IOMMU should direct those writes to the > > destination device. > > > > I would like to take a closer look at the IOMMU implementation on how to achieve > > this, and get back to you. I think the IOMMU would handle this. Could you please > > point me to the IOMMU implementation you have in mind? > > I don't know if the current vfio-user client/server patches already > implement device-to-device DMA, but the functionality is supported by > the vfio-user protocol. > > Basically: if the DMA regions lookup inside the vfio-user server fails, > fall back to VFIO_USER_DMA_READ/WRITE messages instead. > https://github.com/nutanix/libvfio-user/blob/master/docs/vfio-user.rst#vfio-user-dma-read > > Here is the flow: > 1. The vfio-user server with device A sends a DMA read to QEMU. > 2. QEMU finds the MemoryRegion associated with the DMA address and sees > it's a device. > a. If it's emulated inside the QEMU process then the normal > device emulation code kicks in. > b. If it's another vfio-user PCI device then the vfio-user PCI proxy > device forwards the DMA to the second vfio-user server's device B. I'm starting to be curious if there's a way to persuade the guest kernel to do it for us; in general is there a way to say to PCI devices that they can only DMA to the host and not other PCI devices? Or that the address space of a given PCIe bus is non-overlapping with one of the others? Dave > Stefan -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK