From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81A0AC433FE for ; Tue, 8 Feb 2022 17:29:50 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id E33B54B0EC; Tue, 8 Feb 2022 12:29:49 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@google.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id utWfiK5NS5MU; Tue, 8 Feb 2022 12:29:48 -0500 (EST) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 3386F4B0ED; Tue, 8 Feb 2022 12:29:48 -0500 (EST) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id A36434B0ED for ; Tue, 8 Feb 2022 12:29:46 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SN+sSA8XxPSA for ; Tue, 8 Feb 2022 12:29:45 -0500 (EST) Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 5C4574B0EC for ; Tue, 8 Feb 2022 12:29:45 -0500 (EST) Received: by mail-pf1-f171.google.com with SMTP id x65so5548594pfx.12 for ; Tue, 08 Feb 2022 09:29:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=m8OITRUF3qO3145j2yNxK1mPyFY2YT02Ur6jUYn+GKO1VRlHnMOaWUIL1sJdwvDojR oPEc6/htpJRKU8c7xf7vc/wn2V5Vqfmo7MwOGRi3FfJhVDi93iKYQNEc2sDs5ZZw9dCL qKk1P7cMBZz3TX6McC1uwcjvFdUosTNzGmXzJHiu62KBM6bTPU0SQEro9mvq0jmA5cfE 9BHYodaXyLIa6oWQ81Q/yQzq39DQ6xivRV4aZO1F9I05hVxk78XB8o90BuTmvLE/wn7a 5TO1oR931tzsXvUUr0AytwlFJfTGB/BKojykDfy07jLUMTPNp8PgyRJTz63JOWmSrp6I HnlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=3B1hUNLCIIvb8GPEi4nLAdDOYI8o/bJHhCThu7PEFCAN+9+d4hvD6CDcXg791/5Z6H CQByMo4Ybuuth92jXIuv+Ie9C5tr2u3aaqdeq6qMRyWnmwfqyzX1EDxYMoNoVw2tPvBJ +mNpS5s8VrGMhGDp0+mvNM4k7TGe95oWQKY4ms0KPh9qb+CGHCQEYQDzuGre/y9qYRI1 1xbpz6nHW+Dox9YQliYJwZd3/XYSfLCDHKsmEBtIickiobz7U9JHck+C1QCKLK0qw+21 SShgETMnbmPGONgA7ENkq9xYPdHD4DqaCkuQOH3Hfl2hoz2RP0yXhi0+SYDWi/Nkpx9h coiQ== X-Gm-Message-State: AOAM530Yb/IEcGZfGSCHIyDW74vdUDUtpy99G8hUZuILaIzxTCvnic61 ST1AoNsRB5dqCfnfwVqo/VSf1kZKVUbSvQ== X-Google-Smtp-Source: ABdhPJz6zmIEKBOeOCKKdJ5NUffOHN3XDCXl133mR5D4ANHuh+PWBr7nuWITYY9fxOfb8fUgBYb/GQ== X-Received: by 2002:a05:6a00:16d4:: with SMTP id l20mr5358471pfc.5.1644341384078; Tue, 08 Feb 2022 09:29:44 -0800 (PST) Received: from google.com (150.12.83.34.bc.googleusercontent.com. [34.83.12.150]) by smtp.gmail.com with ESMTPSA id y18sm11758088pgh.67.2022.02.08.09.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:29:43 -0800 (PST) Date: Tue, 8 Feb 2022 09:29:39 -0800 From: Ricardo Koller To: Marc Zyngier Subject: Re: [PATCH] KVM: arm64: vgic: Read HW interrupt pending state from the HW Message-ID: References: <20220208123726.3604198-1-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220208123726.3604198-1-maz@kernel.org> Cc: kvm@vger.kernel.org, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, Feb 08, 2022 at 12:37:26PM +0000, Marc Zyngier wrote: > It appears that a read access to GIC[DR]_I[CS]PENDRn doesn't always > result in the pending interrupts being accurately reported if they are > mapped to a HW interrupt. This is particularily visible when acking > the timer interrupt and reading the GICR_ISPENDR1 register immediately > after, for example (the interrupt appears as not-pending while it really > is...). > > This is because a HW interrupt has its 'active and pending state' kept > in the *physical* distributor, and not in the virtual one, as mandated > by the spec (this is what allows the direct deactivation). The virtual > distributor only caries the pending and active *states* (note the > plural, as these are two independent and non-overlapping states). > > Fix it by reading the HW state back, either from the timer itself or > from the distributor if necessary. > > Reported-by: Ricardo Koller > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-mmio.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c > index 7068da080799..49837d3a3ef5 100644 > --- a/arch/arm64/kvm/vgic/vgic-mmio.c > +++ b/arch/arm64/kvm/vgic/vgic-mmio.c > @@ -248,6 +248,8 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, > IRQCHIP_STATE_PENDING, > &val); > WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); > + } else if (vgic_irq_is_mapped_level(irq)) { > + val = vgic_get_phys_line_level(irq); > } else { > val = irq_is_pending(irq); > } > -- > 2.34.1 > Thanks Marc! Tested this fix with a selftest that we are planning to upstream soon. It fires and handles arch timer IRQs while checking the pending state along the way. Tested-by: Ricardo Koller Reviewed-by: Ricardo Koller _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B4088C433FE for ; Tue, 8 Feb 2022 17:31:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sy2AgMSqDcOIZHp+bgfxIYac8zkDAXcfQ7r8QPCLdj8=; b=wpBC2xeNCvYJ9Q T7C8nVnHquOT+lXj1PtXh4xD6fu9ZaN7FKz0jHix7fsnk6qsEavE0javyxQjU1I54xigti3ZdEwbW pYvOPWleBOZ4CiGGSEfZN4lkov+GqepGnqStyi9sTS5VqCsAwISbQzGZwsN7JUYvPp2dESg+5HmE+ Ss9c3BSb6i1Xb8afE1briyiLzWn4wPQfD1nCGsQb9ZkhUtQO9Nghx/yTSIrN2GNuZnRwLqorlVTKO JGS8YG6JXeySm4M4R/JV/vMS33oX1B2LzraDzGo59N9Dx7LaTr2uh8vAEB46SCbwovleR/bl9bjvZ GCa3rXY4Z/W5b1pEATVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHUJO-00F6dM-Jk; Tue, 08 Feb 2022 17:29:55 +0000 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHUJJ-00F6aC-4V for linux-arm-kernel@lists.infradead.org; Tue, 08 Feb 2022 17:29:50 +0000 Received: by mail-pf1-x434.google.com with SMTP id d187so20047055pfa.10 for ; Tue, 08 Feb 2022 09:29:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=m8OITRUF3qO3145j2yNxK1mPyFY2YT02Ur6jUYn+GKO1VRlHnMOaWUIL1sJdwvDojR oPEc6/htpJRKU8c7xf7vc/wn2V5Vqfmo7MwOGRi3FfJhVDi93iKYQNEc2sDs5ZZw9dCL qKk1P7cMBZz3TX6McC1uwcjvFdUosTNzGmXzJHiu62KBM6bTPU0SQEro9mvq0jmA5cfE 9BHYodaXyLIa6oWQ81Q/yQzq39DQ6xivRV4aZO1F9I05hVxk78XB8o90BuTmvLE/wn7a 5TO1oR931tzsXvUUr0AytwlFJfTGB/BKojykDfy07jLUMTPNp8PgyRJTz63JOWmSrp6I HnlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=gfr50J1c6u5puldnT/LvaZSVFQBsMPIQvy6gundGHw9XoBBWQMDZlywtrPcwjiF4SN pXN+Ssny0sl2sD6Y/4kcVuU73Bwkmj6X6gOD4RTETEO9p+VFerm6fTnM6R7gyx3MCrN6 HafYNqeDwT3JKCyKjEfjf33tuvhANWVfJLQ1otpeDLHkieqP3lEglW2UWeyJxYLzkS/5 +ShSP/xgzom8O0KDQkh5tS5fFeRtOBOkWuiPjMiAupS1CP+aIN3JxzA0t4bMGJhOBUdT mbO5ZzTALsgCsI2o7GchZqntqgTAST3K95D4Fs0Z445fbKghkiLjMbpgKzMu34yk8XPv PaXw== X-Gm-Message-State: AOAM531zqNKn30aGXxpcN/r2P1ETd7KCd4HhRZWtss8TVUQANc4iBhiy XJZW4VjQmuAllj5gaJ9CXmmbpw== X-Google-Smtp-Source: ABdhPJz6zmIEKBOeOCKKdJ5NUffOHN3XDCXl133mR5D4ANHuh+PWBr7nuWITYY9fxOfb8fUgBYb/GQ== X-Received: by 2002:a05:6a00:16d4:: with SMTP id l20mr5358471pfc.5.1644341384078; Tue, 08 Feb 2022 09:29:44 -0800 (PST) Received: from google.com (150.12.83.34.bc.googleusercontent.com. [34.83.12.150]) by smtp.gmail.com with ESMTPSA id y18sm11758088pgh.67.2022.02.08.09.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:29:43 -0800 (PST) Date: Tue, 8 Feb 2022 09:29:39 -0800 From: Ricardo Koller To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Alexandru Elisei , kernel-team@android.com Subject: Re: [PATCH] KVM: arm64: vgic: Read HW interrupt pending state from the HW Message-ID: References: <20220208123726.3604198-1-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220208123726.3604198-1-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220208_092949_225264_FDA0B7AD X-CRM114-Status: GOOD ( 23.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Feb 08, 2022 at 12:37:26PM +0000, Marc Zyngier wrote: > It appears that a read access to GIC[DR]_I[CS]PENDRn doesn't always > result in the pending interrupts being accurately reported if they are > mapped to a HW interrupt. This is particularily visible when acking > the timer interrupt and reading the GICR_ISPENDR1 register immediately > after, for example (the interrupt appears as not-pending while it really > is...). > > This is because a HW interrupt has its 'active and pending state' kept > in the *physical* distributor, and not in the virtual one, as mandated > by the spec (this is what allows the direct deactivation). The virtual > distributor only caries the pending and active *states* (note the > plural, as these are two independent and non-overlapping states). > > Fix it by reading the HW state back, either from the timer itself or > from the distributor if necessary. > > Reported-by: Ricardo Koller > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-mmio.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c > index 7068da080799..49837d3a3ef5 100644 > --- a/arch/arm64/kvm/vgic/vgic-mmio.c > +++ b/arch/arm64/kvm/vgic/vgic-mmio.c > @@ -248,6 +248,8 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, > IRQCHIP_STATE_PENDING, > &val); > WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); > + } else if (vgic_irq_is_mapped_level(irq)) { > + val = vgic_get_phys_line_level(irq); > } else { > val = irq_is_pending(irq); > } > -- > 2.34.1 > Thanks Marc! Tested this fix with a selftest that we are planning to upstream soon. It fires and handles arch timer IRQs while checking the pending state along the way. Tested-by: Ricardo Koller Reviewed-by: Ricardo Koller _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3A6DC433EF for ; Tue, 8 Feb 2022 17:29:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383493AbiBHR3t (ORCPT ); Tue, 8 Feb 2022 12:29:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242978AbiBHR3s (ORCPT ); Tue, 8 Feb 2022 12:29:48 -0500 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8115C061576 for ; Tue, 8 Feb 2022 09:29:44 -0800 (PST) Received: by mail-pf1-x434.google.com with SMTP id n23so292872pfo.1 for ; Tue, 08 Feb 2022 09:29:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=m8OITRUF3qO3145j2yNxK1mPyFY2YT02Ur6jUYn+GKO1VRlHnMOaWUIL1sJdwvDojR oPEc6/htpJRKU8c7xf7vc/wn2V5Vqfmo7MwOGRi3FfJhVDi93iKYQNEc2sDs5ZZw9dCL qKk1P7cMBZz3TX6McC1uwcjvFdUosTNzGmXzJHiu62KBM6bTPU0SQEro9mvq0jmA5cfE 9BHYodaXyLIa6oWQ81Q/yQzq39DQ6xivRV4aZO1F9I05hVxk78XB8o90BuTmvLE/wn7a 5TO1oR931tzsXvUUr0AytwlFJfTGB/BKojykDfy07jLUMTPNp8PgyRJTz63JOWmSrp6I HnlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=fsUwRxSsX+G8xGWS1HEWow090yW+YYPFlcyEjg1XLVo=; b=t5k+pa3/qpBlZ8wa+uDvwrXh7Q1v9c9wiGbzF2+V59/WLiSvolpDewl56UKJviGC2T bItKsJgKnG/PmDNFKfvTmLhNGdnLNHlNM+DUfzZtyCzPtR9J2p6TIlU2E3YQF5DEUsbx fp54RH/6qqDxEZNcVkZs6g7AlPBVcJCyIzks+MzBxKMxvXiqZsDMbKBjSP1luTDE4x6E lLAMm/XyLnmEsIrH/1ESPtkjsQoEKjkILvYXrmCVpu4s/RFJ15WXRCYlXqtO1y6vpN/8 //NMQXwt8iXM5sPpMlyJhsmTU0QVEqa8DBl9T8H3BIOZvYjEzlVh0jcukNqFptEggBhY m5pw== X-Gm-Message-State: AOAM533EFUKRZfW0aoZqrFCJCnAaRPDgzaaTnzBdXPSVz+cUuAKH9pT7 lsVeuhpH4KlyAWHQag0FX0qynQ== X-Google-Smtp-Source: ABdhPJz6zmIEKBOeOCKKdJ5NUffOHN3XDCXl133mR5D4ANHuh+PWBr7nuWITYY9fxOfb8fUgBYb/GQ== X-Received: by 2002:a05:6a00:16d4:: with SMTP id l20mr5358471pfc.5.1644341384078; Tue, 08 Feb 2022 09:29:44 -0800 (PST) Received: from google.com (150.12.83.34.bc.googleusercontent.com. [34.83.12.150]) by smtp.gmail.com with ESMTPSA id y18sm11758088pgh.67.2022.02.08.09.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:29:43 -0800 (PST) Date: Tue, 8 Feb 2022 09:29:39 -0800 From: Ricardo Koller To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Alexandru Elisei , kernel-team@android.com Subject: Re: [PATCH] KVM: arm64: vgic: Read HW interrupt pending state from the HW Message-ID: References: <20220208123726.3604198-1-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220208123726.3604198-1-maz@kernel.org> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, Feb 08, 2022 at 12:37:26PM +0000, Marc Zyngier wrote: > It appears that a read access to GIC[DR]_I[CS]PENDRn doesn't always > result in the pending interrupts being accurately reported if they are > mapped to a HW interrupt. This is particularily visible when acking > the timer interrupt and reading the GICR_ISPENDR1 register immediately > after, for example (the interrupt appears as not-pending while it really > is...). > > This is because a HW interrupt has its 'active and pending state' kept > in the *physical* distributor, and not in the virtual one, as mandated > by the spec (this is what allows the direct deactivation). The virtual > distributor only caries the pending and active *states* (note the > plural, as these are two independent and non-overlapping states). > > Fix it by reading the HW state back, either from the timer itself or > from the distributor if necessary. > > Reported-by: Ricardo Koller > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-mmio.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c > index 7068da080799..49837d3a3ef5 100644 > --- a/arch/arm64/kvm/vgic/vgic-mmio.c > +++ b/arch/arm64/kvm/vgic/vgic-mmio.c > @@ -248,6 +248,8 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, > IRQCHIP_STATE_PENDING, > &val); > WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); > + } else if (vgic_irq_is_mapped_level(irq)) { > + val = vgic_get_phys_line_level(irq); > } else { > val = irq_is_pending(irq); > } > -- > 2.34.1 > Thanks Marc! Tested this fix with a selftest that we are planning to upstream soon. It fires and handles arch timer IRQs while checking the pending state along the way. Tested-by: Ricardo Koller Reviewed-by: Ricardo Koller