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16:10:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1A3A9C004E1; Thu, 10 Feb 2022 16:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644509412; bh=ZAorFPJpvUFVFfC8NuB8t266XcSbj42njOVNokd0dNI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ZeNgkJL9Trv43cyPqcRNLgzsO9LuxFTQK2vJ1dEhPqEN7KQ3PmsPrIwNYbDpvKGZn 69d0QHkczLmrGiQqx+EbiEEYNRPZupkA2CJ70hnLTad+V4HKubd5nfhRlgJVAOROLF +yhe7l1O2oYK/N+DTMpY5XAMN2O/GjdubZisOnu+ZMRIDx/C1U9h6t0DK/RmDS+gDz k9KrryjofYBOiuRRRVj71l4dCBP8uNIfapILtwiz03tA6wE9GyNBYT8iiIYSqcKeyc dXGm3ASW46sBzRiPJ4Mfd+l8b2SM6KZMU8E4PS/u+VAkDizpgLU0qpPcSuxXng9Pa8 rLGhJD9zkLtyQ== Date: Fri, 11 Feb 2022 00:01:42 +0800 From: Jisheng Zhang To: Heiko =?utf-8?Q?St=C3=BCbner?= Cc: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org, atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org, hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech, gfavor@ventanamicro.com, andrea.mondelli@huawei.com, behrensj@mit.edu, xinhaoqu@huawei.com, huffman@cadence.com, mick@ics.forth.gr, allen.baum@esperantotech.com, jscheid@ventanamicro.com, rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com, philipp.tomsich@vrull.eu Subject: Re: [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Message-ID: References: <20220209123800.269774-1-heiko@sntech.de> <14426959.46CLvVMboC@diego> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <14426959.46CLvVMboC@diego> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220210_081015_929378_F0A2B501 X-CRM114-Status: GOOD ( 44.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: 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IGl0c2VsZi4KPiA+ID4gVGhlIGJpZ2dlc3Qgb25lIGJlaW5nIHRoZSBtb3ZlIHRvIGEgbW9yZSBj ZW50cmFsIGxvY2F0aW9uLCBhcyBJIGV4cGVjdAo+ID4gPiBpbiB0aGUgZnV0dXJlLCBuZWFybHkg ZXZlcnkgY2hpcCBuZWVkaW5nIHNvbWUgc29ydCBvZiBwYXRjaGluZywgYmUgaXQKPiA+ID4gZWl0 aGVyIGZvciBlcnJhdGFzIG9yIGZvciBvcHRpb25hbCBmZWF0dXJlcyAoc3ZwYm10IG9yIG90aGVy cykuCj4gPiA+IAo+ID4gPiBUaGUgZHQtYmluZGluZyBmb3Igc3ZwYm10IGl0c2VsZiBpcyBvZiBj b3Vyc2Ugbm90IGZpbmlzaGVkIGFuZCBpcyBzdGlsbAo+ID4gPiB1c2luZyB0aGUgYmluZGluZyBp bnRyb2R1Y2VkIGluIHByZXZpb3VzIHZlcnNpb25zLCBhcyB3aGVyZSB0byBwdXQKPiA+ID4gYSBz dnBibXQtcHJvcGVydHkgaW4gdGhlIGRldmljZXRyZWUgaXMgc3RpbGwgdW5kZXIgZGljdXNzaW9u Lgo+ID4gPiBBdGlzaCBzZWVtcyB0byBiZSB3b3JraW5nIG9uIGEgZnJhbWV3b3JrIGZvciBleHRl bnNpb25zIFswXSwKPiA+ID4gCj4gPiA+IFRoZSBzZXJpZXMgYWxzbyBpbnRyb2R1Y2VzIHN1cHBv cnQgZm9yIHRoZSBtZW1vcnkgdHlwZXMgb2YgdGhlIEQxCj4gPiA+IHdoaWNoIGFyZSBpbXBsZW1l bnRlZCBkaWZmZXJlbnRseSB0byBzdnBibXQuIEJ1dCB3aGVuIHBhdGNoaW5nIGFueXdheQo+ID4g PiBpdCdzIHByZXR0eSBjbGVhbiB0byBhZGQgdGhlIEQxIHZhcmlhbnQgdmlhIEFMVEVSTkFUSVZF XzIgdG8gdGhlIHNhbWUKPiA+ID4gbG9jYXRpb24uCj4gPiA+IAo+ID4gPiBUaGUgb25seSBzbGln aHRseSBiaWdnZXIgZGlmZmVyZW5jZSBpcyB0aGF0IHRoZSAibm9ybWFsIiB0eXBlIGlzIG5vdCAw Cj4gPiA+IGFzIHdpdGggc3ZwYm10LCBzbyBrZXJuZWwgcGF0Y2hlcyBmb3IgdGhpcyBQTUEgdHlw ZSBuZWVkIHRvIGJlIGFwcGxpZWQKPiA+ID4gZXZlbiBiZWZvcmUgdGhlIE1NVSBpcyBicm91Z2h0 IHVwLCBzbyB0aGUgc2VyaWVzIGludHJvZHVjZXMgYSBzZXBhcmF0ZQo+ID4gPiBzdGFnZSBmb3Ig dGhhdC4KPiA+ID4gCj4gPiA+IAo+ID4gPiBJbiB0aGVvcnkgdGhpcyBzZXJpZXMgaXMgMyBwYXJ0 czoKPiA+ID4gLSBzYmkgY2FjaGUtZmx1c2ggLyBudWxsLXB0cgo+ID4gPiAtIGFsdGVybmF0aXZl cyBpbXByb3ZlbWVudHMKPiA+ID4gLSBzdnBibXQrZDEKPiA+ID4gCj4gPiA+IFNvIGV4cGVjaWFs bHkgcGF0Y2hlcyBmcm9tIHRoZSBmaXJzdCAyIGFyZWFzIGNvdWxkIGJlIGFwcGxpZWQgd2hlbgo+ ID4gPiBkZWVtZWQgcmVhZHksIEkganVzdCB0aG91Z2h0IHRvIGtlZXAgaXQgdG9nZXRoZXIgdG8g c2hvdy1jYXNlIHdoZXJlCj4gPiA+IHRoZSBlbmQtZ29hbCBpcyBhbmQgbm90IHJlcXVpcmluZyBq dW1waW5nIGJldHdlZW4gZGlmZmVyZW50IHNlcmllcy4KPiA+ID4gCj4gPiA+IAo+ID4gPiBUaGUg c2JpIGNhY2hlLWZsdXNoIHBhdGNoIGlzIGJhc2VkIG9uIEF0aXNoJ3Mgc3BhcnNlLWhhcnRpZCBw YXRjaCBbMV0sCj4gPiA+IGFzIGl0IHRvdWNoZXMgYSBzaW1pbGFyIGFyZWEgaW4gbW0vY2FjaGVm bHVzaC5jCj4gPiA+IAo+ID4gPiAKPiA+ID4gSSBwaWNrZWQgdGhlIHJlY2lwaWVudCBsaXN0IGZy b20gdGhlIHByZXZpb3VzIHZlcnNpb24sIGhvcGVmdWxseQo+ID4gPiBJIGRpZG4ndCBmb3JnZXQg YW55Ym9keS4KPiA+ID4gCj4gPiA+IGNoYW5nZXMgaW4gdjY6Cj4gPiA+IC0gcmViYXNlIG9udG8g NS4xNy1yYzEKPiA+ID4gLSBoYW5kbGUgc2JpIG51bGwtcHRyIGRpZmZlcmVudGx5Cj4gPiA+IC0g aW1wcm92ZSBjb21taXQgbWVzc2FnZXMKPiA+ID4gLSB1c2UgcmlzY3YsbW11IGFzIHByb3BlcnR5 IG5hbWUKPiA+ID4gCj4gPiA+IGNoYW5nZXMgaW4gdjU6Cj4gPiA+IC0gbW92ZSB0byB1c2UgYWx0 ZXJuYXRpdmVzIGZvciBydW50aW1lLXBhdGNoaW5nCj4gPiAKPiA+IGFub3RoZXIgY2hvaWNlIGlz IHVzaW5nIHN0YXRpYyBrZXkgbWVjaGFuaXNtLiBQcm9zOiBubyBuZWVkIHRvIGNvZGluZwo+ID4g aW4gYXNtLCBhbGwgaW4gYy4KPiA+IAo+ID4gVG8gc3VwcG9ydCBuZXcgYXJjaCBmZWF0dXJlcywg SSBzZWUgb3RoZXIgYXJjaCBzb21ldGltZXMgdXNlIHN0YXRpYwo+ID4ga2V5LCBzb21ldGltZXMg dXNlIGFsdGVybmF0aXZlIG1lY2hhbmlzbSwgc28gb25lIHF1ZXN0aW9uIGhlcmUgd291bGQKPiA+ IGJlIHdoaWNoIG1lY2hhbmlzbSBpcyBiZXR0ZXI/IEFueSBndWlkZT8KPiAKPiBGb3IgbWUgaXQn cyBhbHNvIGEgYml0IG9mIGEgbGVhcm4tYXMteW91LWdvIGV4cGVyaWVuY2UsIGJ1dCBJIGRvIHNl ZSBzb21lCgpJIGhvcGUgb2xkIGhhbmRzIGNhbiBnaXZlIHNvbWUgc3VnZ2VzdGlvbnMgaGVyZSBh Ym91dCBzdGF0aWMga2V5IFZTLgphbHRlcm5hdGl2ZSA7KS4gV2hlbiB0byB1c2Ugd2hpY2ggbWVj aGFuaXNtLCBhbmQgd2h5LgoKPiBhZHZhbnRhZ2VzIGluIHVzaW5nIGFsdGVybmF0aXZlczoKPiAK PiAtIFN0YXRpYyBrZXlzIG5lZWQgdGhlIGp1bXAtbGFiZWwgaW5mcmFzdHJ1Y3R1cmUsIHdoaWNo IHRoZSBSaXNjViBrZXJuZWwKPiAgIG9ubHkgc2VlbXMgdG8gcHJvdmlkZSBvbiBub24tWElQIGtl cm5lbHMgWzBdCgpJIHRoaW5rIHlvdSBmb3VuZCBvbmUgYnVnIGhlcmUuCkkgYmVsaWV2ZSBhbHRl cm5hdGl2ZSBtZWNoYW5pc20gYWxzbyBkb2Vzbid0IHdvcmsgZm9yIFhJUCBrZXJuZWwuIEkgd2ls bApzdWJtaXQgYSBwYXRjaCBmb3IgdGhpcyBjYXNlLgoKPiAtIHRoZSBhbW91bnQgb2YgYXNtIGhl cmUgaXMgc29tZXdoYXQgbWluaW1hbCBmb3IgdGhlIGNvcmUgbm8tY2FjaGUgYW5kIGlvCj4gICB0 eXBlcyAobG9hZCBpbW1lZGlhdGUgKyBzaGlmdCkKPiAtIHVzaW5nIHRoZSBzdGF0aWMga2V5IG1l Y2hhbmlzbSBzdGlsbCBkb2VzIGluY3VyIG1vcmUgb3ZlcmhlYWQgZm9yIHRoZQo+ICAgY29uZGl0 aW9uYWwKCmRvIHlvdSBtZWFuIHRoZSBpY2FjaGUgb3ZlcmhlYWQgZHVlIHRvIHRoZSBvdGhlciBk aXNhYmxlZCBicmFuY2ggb2YKc3RhdGljIGtleT8gSXQgZGVzZXJ2ZXMgYSBjaGVjay4KCj4gLSBh bmQgaWYgd2Ugd2FudCB0byBzdXBwb3J0IHRoZSBzdHJhbmdlIGZhbWlseS1tZW1iZXJzIGxpa2Ug dGhlIEQxLAo+ICAgKGFuZCBpdCBzZWVtcyB3ZSBkbyB3YW50IHRoYXQpIHRoaXMgd291bGQgY3Jl YXRlIG1vcmUgY29uZGl0aW9uYWxzCgpNYXliZSBpbXBsZW1lbnQgdGhlIHN0YW5kYXJkIHN2cGJt dCB2aWEuIHN0YXRpYyBrZXkgYW5kIGNvcGUgd2l0aCBEMSBhcwplcnJhdGEgYWx0ZXJuYXRpdmUu Cj4gICBhcyB3ZSBoYXZlIHRvIHRlc3QgZm9yIHN2cGJtdCwgZDEgYW5kIG1heWJlIGZ1dHVyZSBz cGVjaWFsIGNhc2VzLAoKRnJvbSBEb2N1bWVudGF0aW9uL3Jpc2N2L3BhdGNoLWFjY2VwdGFuY2Uu cnN0LCB0aGUgIlN1Ym1pdCBDaGVja2xpc3QKQWRkZW5kdW0iIHNlY3Rpb24sICJ3ZSdsbCBvbmx5 IHRvIGFjY2VwdCBwYXRjaGVzIGZvciBleHRlbnNpb25zIHRoYXQKaGF2ZSBiZWVuIG9mZmljaWFs bHkgZnJvemVuIG9yIHJhdGlmaWVkIGJ5IHRoZSBSSVNDLVYgRm91bmRhdGlvbi4iClRoaXMgcnVs ZSBoYXNuJ3QgYmVlbiBjaGFuZ2VkLgpQZXIgbXkgdW5kZXJzdGFuZGluZyBvZiBoaXN0b3J5IG9m IHRoZSBzdnBibXQgcGF0Y2ggc2V0LCBubyBmdXR1cmUKc3BlY2lhbCBjYXNlcyBhbnkgbW9yZS4K Cj4gICB3aGVyZSBhbHRlcm5hdGl2ZXMtcGF0Y2hpbmcgb24gdGhlIG90aGVyIGhhbmQgc2ltcGx5 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ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E153EB; Thu, 10 Feb 2022 08:10:15 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B2557B82656; Thu, 10 Feb 2022 16:10:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1A3A9C004E1; Thu, 10 Feb 2022 16:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644509412; bh=ZAorFPJpvUFVFfC8NuB8t266XcSbj42njOVNokd0dNI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ZeNgkJL9Trv43cyPqcRNLgzsO9LuxFTQK2vJ1dEhPqEN7KQ3PmsPrIwNYbDpvKGZn 69d0QHkczLmrGiQqx+EbiEEYNRPZupkA2CJ70hnLTad+V4HKubd5nfhRlgJVAOROLF +yhe7l1O2oYK/N+DTMpY5XAMN2O/GjdubZisOnu+ZMRIDx/C1U9h6t0DK/RmDS+gDz k9KrryjofYBOiuRRRVj71l4dCBP8uNIfapILtwiz03tA6wE9GyNBYT8iiIYSqcKeyc dXGm3ASW46sBzRiPJ4Mfd+l8b2SM6KZMU8E4PS/u+VAkDizpgLU0qpPcSuxXng9Pa8 rLGhJD9zkLtyQ== Date: Fri, 11 Feb 2022 00:01:42 +0800 From: Jisheng Zhang To: Heiko =?utf-8?Q?St=C3=BCbner?= Cc: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org, atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org, hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech, gfavor@ventanamicro.com, andrea.mondelli@huawei.com, behrensj@mit.edu, xinhaoqu@huawei.com, huffman@cadence.com, mick@ics.forth.gr, allen.baum@esperantotech.com, jscheid@ventanamicro.com, rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com, philipp.tomsich@vrull.eu Subject: Re: [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Message-ID: References: <20220209123800.269774-1-heiko@sntech.de> <14426959.46CLvVMboC@diego> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <14426959.46CLvVMboC@diego> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Feb 10, 2022 at 12:44:04AM +0100, Heiko Stübner wrote: > Hi, > > Am Mittwoch, 9. Februar 2022, 18:49:19 CET schrieb Jisheng Zhang: > > On Wed, Feb 09, 2022 at 01:37:46PM +0100, Heiko Stuebner wrote: > > > Svpbmt is an extension defining "Supervisor-mode: page-based memory types" > > > for things like non-cacheable pages or I/O memory pages. > > > > > > > > > So this is my 2nd try at implementing Svpbmt (and the diverging D1 memory > > > types) using the alternatives framework. > > > > > > This includes a number of changes to the alternatives mechanism itself. > > > The biggest one being the move to a more central location, as I expect > > > in the future, nearly every chip needing some sort of patching, be it > > > either for erratas or for optional features (svpbmt or others). > > > > > > The dt-binding for svpbmt itself is of course not finished and is still > > > using the binding introduced in previous versions, as where to put > > > a svpbmt-property in the devicetree is still under dicussion. > > > Atish seems to be working on a framework for extensions [0], > > > > > > The series also introduces support for the memory types of the D1 > > > which are implemented differently to svpbmt. But when patching anyway > > > it's pretty clean to add the D1 variant via ALTERNATIVE_2 to the same > > > location. > > > > > > The only slightly bigger difference is that the "normal" type is not 0 > > > as with svpbmt, so kernel patches for this PMA type need to be applied > > > even before the MMU is brought up, so the series introduces a separate > > > stage for that. > > > > > > > > > In theory this series is 3 parts: > > > - sbi cache-flush / null-ptr > > > - alternatives improvements > > > - svpbmt+d1 > > > > > > So expecially patches from the first 2 areas could be applied when > > > deemed ready, I just thought to keep it together to show-case where > > > the end-goal is and not requiring jumping between different series. > > > > > > > > > The sbi cache-flush patch is based on Atish's sparse-hartid patch [1], > > > as it touches a similar area in mm/cacheflush.c > > > > > > > > > I picked the recipient list from the previous version, hopefully > > > I didn't forget anybody. > > > > > > changes in v6: > > > - rebase onto 5.17-rc1 > > > - handle sbi null-ptr differently > > > - improve commit messages > > > - use riscv,mmu as property name > > > > > > changes in v5: > > > - move to use alternatives for runtime-patching > > > > another choice is using static key mechanism. Pros: no need to coding > > in asm, all in c. > > > > To support new arch features, I see other arch sometimes use static > > key, sometimes use alternative mechanism, so one question here would > > be which mechanism is better? Any guide? > > For me it's also a bit of a learn-as-you-go experience, but I do see some I hope old hands can give some suggestions here about static key VS. alternative ;). When to use which mechanism, and why. > advantages in using alternatives: > > - Static keys need the jump-label infrastructure, which the RiscV kernel > only seems to provide on non-XIP kernels [0] I think you found one bug here. I believe alternative mechanism also doesn't work for XIP kernel. I will submit a patch for this case. > - the amount of asm here is somewhat minimal for the core no-cache and io > types (load immediate + shift) > - using the static key mechanism still does incur more overhead for the > conditional do you mean the icache overhead due to the other disabled branch of static key? It deserves a check. > - and if we want to support the strange family-members like the D1, > (and it seems we do want that) this would create more conditionals Maybe implement the standard svpbmt via. static key and cope with D1 as errata alternative. > as we have to test for svpbmt, d1 and maybe future special cases, >From Documentation/riscv/patch-acceptance.rst, the "Submit Checklist Addendum" section, "we'll only to accept patches for extensions that have been officially frozen or ratified by the RISC-V Foundation." This rule hasn't been changed. Per my understanding of history of the svpbmt patch set, no future special cases any more. > where alternatives-patching on the other hand simply replaces the > relevant code with the appropriate variant. >